14.8.13 ANT_DIV
| Name: | ANT_DIV |
| Offset: | 0x0D |
| Reset: | 0x01 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ANT_SEL | ANT_DIV_EN | ANT_EXT_SW_EN | ANT_CTRL[1:0] | ||||||
| Access | R | R | R | R | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | |
Bit 7 – ANT_SEL ANT_SEL
Signals status of antenna at the time of the last IRQ_2 (RX_START) interrupt, IRQ_3 (TRX_END) interrupt, or TX_START event.
| Value | Description |
|---|---|
| 0x0 | Antenna 0 |
| 0x1 | Antenna 1 |
The register bit signals the status of the selected antenna at the time of the last IRQ_2 (RX_START) interrupt, IRQ_3 (TRX_END) interrupt, or TX_START event. This information can be used to build up a history of the antenna used for successful transmission (indicated by an acknowledgement frame) in TX_ARET mode.
Bit 3 – ANT_DIV_EN ANT_DIV_EN
The register bit ANT_DIV_EN controls TX antenna diversity.
| Value | Description |
|---|---|
| 0x0 | TX antenna diversity is disabled. |
| 0x1 | TX antenna diversity is enabled. |
If set to one, antenna diversity is enabled in TX_ARET mode with expected ACK reply. The transceiver automatically selects the antenna with the aim to minimize the number of retransmissions.
Bit 2 – ANT_EXT_SW_EN ANT_EXT_SW_EN
The register bit ANT_EXT_SW_EN controls the external antenna switch.
| Value | Description |
|---|---|
| 0x0 | Antenna Diversity RF switch control is disabled |
| 0x1 | Antenna Diversity RF switch control is enabled |
If enabled, pin 9 (DIG1) and pin 10 (DIG2) become output pins and provide a differential control signal for an antenna diversity switch. The selection of an antenna within TX_ARET mode is done automatically if ANT_DIV_EN = 1, or, if ANT_DIV_EN = 0, according to register bits ANT_CTRL.
If RX Frame Time Stamping is used in combination with Antenna Diversity, pin 9 (DIG1) is used for Antenna Diversity and pin 10 (DIG2) is used for RX Frame Time Stamping. AT86RF212B does not provide a differential control signal in this case.
If the register bit is set, the control pins DIG1/DIG2 are activated in all radio transceiver states as long as register bit ANT_EXT_SW_EN is set. If the AT86RF212B is not in a receive or transmit state, it is recommended to disable register bit ANT_EXT_SW_EN to reduce the power consumption or avoid leakage current of an external RF switch, especially during SLEEP state. If register bit ANT_EXT_SW_EN = 0, output pins DIG1 and DIG2 are internally connected to digital ground.
Bits 1:0 – ANT_CTRL[1:0] ANT_CTRL
These register bits provide a static control of an Antenna Diversity switch.
| Value | Description |
|---|---|
| Reserved | Reserved |
| 0x1 |
Antenna 0 DIG1 = L DIG2 = H |
| 0x2 |
Antenna 1 DIG1 = H DIG2 = L |
| Reserved | Reserved |
These register bits provide a static control of an Antenna Diversity switch if ANT_DIV_EN = 0 and ANT_EXT_SW_EN = 1. Although it is possible to change register bits ANT_CTRL in state TRX_OFF, this change will be effective at DIG1 and DIG2 in states PLL_ON and RX_ON.