Clock networks are internal clock network pins used as a clock source. With this network type,
you can set the clock constraint on any pin in the clock network. You may want to do this to
eliminate clock network pessimism by short-cutting a reconvergent combinational logic on the
clock network (as shown below). Clock network pessimism triggers an overestimation of the
clock skew, making the timing analysis inaccurate.Figure 21-28. Source Being Set Within a Clock Network
