3.10.7.4.1.6 T3ICRH – Timer3
Input Capture Register High Byte
The input capture
register T3ICR is updated with the counter value (T3CNT) each time a capture trigger
event occurs on the selected capture source. Trigger signal and edge selection is done
in T3MRA. The T3CNT content can be read via the capture register after a software
capture event.
Name:
T3ICRH
Offset:
0x07C
Reset:
0x00
Bit
7
6
5
4
3
2
1
0
T3ICR[7:0]
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bits 7:0 – T3ICR[7:0] Timer3 Counter
Capture Value (High Byte)
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