The counter register (T3CNTL) contains the lower 8-bit of the counter value. It must
be read only when the timer is disabled (T3CR.T3ENA = 0). Due to
the asynchronous implementation, it can result in unpredictable read values if
ignored.
Name:
T3CNTL
Offset:
0x077
Reset:
0x00
Bit
7
6
5
4
3
2
1
0
T3CNTL[7:0]
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bits 7:0 – T3CNTL[7:0] Timer3 Counter
Value Low Byte
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