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35.7.49 Tx Buffer Transmission Occurred
Table 35-67. Register Bit Attribute
Legend Symbol Description Symbol Description Symbol Description R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented W Writable bit HS Set by Hardware X Bit is unknown at Reset K Write to clear S Software settable bit — —
Name: TXBTO Offset: 0x1D8 Reset: 0x00000000 Property: R
Bit 31 30 29 28 27 26 25 24 TO31 TO30 TO29 TO28 TO27 TO26 TO25 TO24 Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16 TO23 TO22 TO21 TO20 TO19 TO18 TO17 TO16 Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 TO15 TO14 TO13 TO12 TO11 TO10 TO9 TO8 Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 TO7 TO6 TO5 TO4 TO3 TO2 TO1 TO0 Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 31 – TO31 Transmission Occurred 31
Bit 30 – TO30 Transmission Occurred 30
Bit 29 – TO29 Transmission Occurred 29
Bit 28 – TO28 Transmission Occurred 28
Bit 27 – TO27 Transmission Occurred 27
Bit 26 – TO26 Transmission Occurred 26
Bit 25 – TO25 Transmission Occurred 25
Bit 24 – TO24 Transmission Occurred 24
Bit 23 – TO23 Transmission Occurred 23
Bit 22 – TO22 Transmission Occurred 22
Bit 21 – TO21 Transmission Occurred 21
Bit 20 – TO20 Transmission Occurred 20
Bit 19 – TO19 Transmission Occurred 19
Bit 18 – TO18 Transmission Occurred 18
Bit 17 – TO17 Transmission Occurred 17
Bit 16 – TO16 Transmission Occurred 16
Bit 15 – TO15 Transmission Occurred 15
Bit 14 – TO14 Transmission Occurred 14
Bit 13 – TO13 Transmission Occurred 13
Bit 12 – TO12 Transmission Occurred 12
Bit 11 – TO11 Transmission Occurred 11
Bit 10 – TO10 Transmission Occurred 10
Bit 9 – TO9 Transmission Occurred 9
Bit 8 – TO8 Transmission Occurred 8
Bit 7 – TO7 Transmission Occurred 7
Bit 6 – TO6 Transmission Occurred 6
Bit 5 – TO5 Transmission Occurred 5
Bit 4 – TO4 Transmission Occurred 4
Bit 3 – TO3 Transmission Occurred 3
Bit 2 – TO2 Transmission Occurred 2
Bit 1 – TO1 Transmission Occurred 1
Bit 0 – TO0 Transmission Occurred 0
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