35.7.57 Timestamp Configuration
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | TSCFG |
| Offset: | 0x264 |
| Reset: | 0x00000000 |
| Property: | R/W |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| TBPRE[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SCP | TBCS | TSUE | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 |
Bits 15:8 – TBPRE[7:0] Time Base Prescaler
0x00 to 0xFF
Valid values range from 0 to 255. The oscillator frequency is divided by TBPRE + 1 for generating the timebase counter clock.
Bit 2 – SCP Select Capturing Position
| Value | Description |
|---|---|
| 0 | Capture Timestamp at EOF |
| 1 | Capture Timestamp at SOF |
Bit 1 – TBCS Timebase Counter Select
| Value | Description |
|---|---|
| 0 | Timestamp value captured from internal timebase counter, ATB.TB[31:0] is the internal timebase counter. |
| 1 | Reserved |
Bit 0 – TSUE Timestamp Unit Enable
| Value | Description |
|---|---|
| 0 | TSU disabled |
| 1 | TSU enabled |