37.7.9 Power Register
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | POWR |
| Offset: | 0x1001 |
| Reset: | 0x0000 |
| Property: | PAC Write-Protection |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ISOUPD | SOFTCONN | HSEN | HSMODE | RESET | RESUME | SUSPMODE | SUSPEN | ||
| Access | R/W | R/W | R/W | R/HS | R | R/W | R/HC | R/W | |
| Reset | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – ISOUPD ISO Update Bit
(Device mode only; unimplemented in Hostmode)
This bit only affects endpoints performing isochronous transfers when in Device mode. This bit is unimplemented in Host mode.
| Value | Description |
|---|---|
| 0 | No change in behavior |
| 1 | USB module will wait for a SOF token from the time TXPKTRDY is set before sending the packet |
Bit 6 – SOFTCONN Soft Connect/Disconnect Feature Selection bit
This bit is only available in Device mode.
| Value | Description |
|---|---|
| 0 | The USB D+/D- lines are disabled and are tri-stated |
| 1 | The USB D+/D- lines are enabled and active |
Bit 5 – HSEN Hi-Speed Enable bit
| Value | Description |
|---|---|
| 0 | Module only operates in Full-Speed mode |
| 1 | The USB module will negotiate for Hi-Speed mode when the device is reset by the hub |
Bit 4 – HSMODE Hi-Speed Mode Status bit
In Device mode, this bit becomes valid when a USB reset completes. In Host mode, it becomes valid when the RESET bit is cleared.
| Value | Description |
|---|---|
| 0 | Module is not in Hi-Speed mode |
| 1 | Hi-Speed mode successfully negotiated during USB reset |
Bit 3 – RESET Module Reset Status bit
In Device mode, this bit is read-only. In Host mode, this bit is read/write.
| Value | Description |
|---|---|
| 0 | Normal module operation |
| 1 | Reset signaling is present on the bus |
Bit 2 – RESUME Resume from Suspend Control bit
In Devicemode, the software should clear this bit after 10 ms (a maximum of 15 ms) to end Resume signaling. In Host mode, the software should clear this bit after 20 ms.
| Value | Description |
|---|---|
| 0 | Stop Resume signaling |
| 1 | Generate Resume signaling when the device is in Suspend mode |
Bit 1 – SUSPMODE Suspend Mode Status bit
This bit is read-only in Device mode. In Host mode, it can be set by software, and is cleared by hardware.
| Value | Description |
|---|---|
| 0 | The USB module is in Normal operations |
| 1 | The USB module is in Suspend mode |
Bit 0 – SUSPEN Suspend Mode Enable bit
| Value | Description |
|---|---|
| 0 | Suspend mode is not enabled |
| 1 | Suspend mode is enabled |