37.7.30 USB RX FIFO Address Register
RXFIFOADD controls the start address of the selected RX endpoint FIFO.
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | RXFIFOADD |
| Offset: | 0x1066 |
| Reset: | 0x0000 |
| Property: | PAC Write-Protection |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| ADDR[12:8] | |||||||||
| Access | R | R | R | R | R | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ADDR[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 12:0 – ADDR[12:0] Receive Endpoint FIFO Address bits
Start address of the endpoint FIFO in units of 8 bytes as follows:
| Value | Description |
|---|---|
| 1111111111111 | 0xFFF8 |
| 0000000000010 | 0x0010 |
| 0000000000001 | 0x0008 |
| 0000000000000 | 0x0000 |