37.7.42 USB High Chirp Time-out Register
Note: Use of this register will allow the Hi-Speed time-out to be set to values that are
greater than the maximum specified in the USB 2.0 specification, making the USB
module non-compliant.
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | CTUCH |
Offset: | 0x1344 |
Reset: | 0x0000 |
Property: | PAC Write-Protection |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
TUCH[15:8] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
TUCH[7:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 15:0 – TUCH[15:0] Chirp Time-out bits.
These bits set the chirp time-out. This number, when multiplied by 4, represents the number of USB module clock cycles before the time-out occurs.