48.33 SD/MMC Host Controller (SDHC) Electrical Specifications

Figure 48-32. SD/SDIO/MMC SDHC Module AC Timing Diagram

Table 48-46. SD Host Controller AC Timing Specifications ⁽¹⁾
AC CHARACTERISTICS			Standard Operating Conditions: VDDIO = AVDD 2.7V to 3.63V, VDDREG = 1.75V to 1.85V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typ	Max.	Units	Conditions
SD_1	fGCLK_SDHCx_SLOW	Common SDHC slow input clock frequency	—	—	32.768	KHz	—
SD_3	fGCLK_SDHCx_CORE	SDHCx input clock frequency	—	—	104	MHz	—
SD/SDIO Default Speed Mode
SD_5	tSDCK	Clock Frequency	—	—	25	MHz	—
SD_7	tDUTY	Duty Cycle	—	50	—	%	—
SD_9	tHIGH	Clock High Time	18.4	—	—	ns	—
SD_11	tLOW	Clock Low Time	18.3	—	—	ns	—
SD_13	tRISE	Clock Rise Time	See I/O Specification DI_25			ns	See parameter DI_25 in the I/O Specifications
SD_15	tFALL	Clock Fall Time	See I/O Specification DI_27			ns	See parameter DI_27 in the I/O Specifications
SD_17	tIN_SETUP	Input Setup Time	3.6	—	—	ns	—
SD_19	tIN_HOLD	Input Hold Time	3	—	—	ns	—
SD_21	tOUT_DLY	Output Delay Time	—	—	6.1	ns	VDDIOx = 3.3V, CLOAD = 30 pF(max)
SD_23	tOUT_SETUP	Output HOLD Time	3	—	—	ns	VDDIOx = 3.3V, CLOAD = 30 pF(max)
SD/SDIO High Speed Mode
SD_25	tSDCK	Clock Frequency	—	—	50	MHz	—
SD_27	tDUTY	Duty Cycle	—	50	—	%	—
SD_29	tHIGH	Clock High Time	8.9	—	—	ns	—
SD_31	tLOW	Clock Low Time	8.5	—	—	ns	—
SD_29	tRISE	Clock Rise Time	See I/O Specification DI_25			ns	See parameter DI_25 in the I/O Specifications
SD_31	tFALL	Clock Fall Time	See I/O Specification DI_27			ns	See parameter DI_27 in the I/O Specifications
SD_33	tIN_SETUP	Input Setup Time	3.1	—	—	ns	—
SD_35	tIN_HOLD	Input Hold Time	3	—	—	ns	—
SD_37	tOUT_DLY	Output Delay Time	—	—	4.9	ns	VDDIOx = 3.3V, CLOAD = 30 pF(max)
SD_39	tOUT_SETUP	Output Hold Time	0.8	—	—	ns	VDDIOx = 3.3V, CLOAD = 30 pF(max)
MMC High Speed Mode
SD_41	tSDCK	Clock Frequency	—	—	52	MHz	—
SD_43	tDUTY	Duty Cycle	—	50	—	%	—
SD_45	tHIGH	Clock High Time	8.9	—	—	ns	—
SD_47	tLOW	Clock Low Time	8.5	—	—	ns	—
SD_49	tRISE	Clock Rise Time	See I/O Specification DI_25			ns	See parameter DI_25 in the I/O Specifications
SD_51	tFALL	Clock Fall Time	See I/O Specification DI_27			ns	See parameter DI_27 in the I/O Specifications
SD_53	tIN_SETUP	Input Setup Time	3.1	—	—	ns	—
SD_55	tIN_HOLD	Input Hold Time	3	—	—	ns	—
SD_57	tOUT_DLY	Output Delay Time	—	—	4.9	ns	VDDIOx = 3.3V, CLOAD = 30 pF(max)
SD_59	tOUT_SETUP	Output Hold Time	0.8	—	—	ns	VDDIOx = 3.3V, CLOAD = 30 pF(max)
Note: All output pins with 30 pF load.

PIC32CZ CA80/CA90 Family

48.33 SD/MMC Host Controller (SDHC) Electrical Specifications