48.13 Maximum Clock Frequencies
AC CHARACTERISTICS | Standard
Operating Conditions: VDDIO = AVDD 1.75V to 3.63V, VDDREG = 1.75V to
1.85V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial | |||
---|---|---|---|---|
Param. No. | Symbol | Characteristics | Max. | Units |
FCLK_1 | FCY | MCU clock frequency | 300 | MHz |
FCLK_3 | fAHB | AHB clock frequency | FCY/2 | MHz |
FCLK_5 | fAPBn | APBA, APBB, APBC, APBD, APBE, APBF clock frequency | FCY/2 | MHz |
FCLK_6 | fGCLKGEN[0] | GCLK clock frequency output | FCY | MHz |
fGCLKGEN[1:16] | FCY | MHz | ||
FCLK_7 | fGCLK_PLLx | PLL0 and PLL1 reference clock frequency | 48 | MHz |
FCLK_11 | fGCLK_DFLL48M_REF | DFLL 48M reference clock frequency | 1 | MHz |
FCLK_13 | fGCLK_EIC | EIC input clock frequency | 100 | MHz |
FCLK_15 | fGCLK_FREQM_MSR | FREQM Measure Clock Freqency | FCY | MHz |
FCLK_17 | fGCLK_FREQM_REF | FREQM Reference Clock Frequency | 100 | MHz |
FCLK_19 | fGCLK_EVSYS_CHANNELx | EVSYS channel x input clock frequency | 100 | MHz |
FCLK_21 | fGCLK_SERCOMx_SLOW | Common SERCOM slow input clock frequency | 32 | KHz |
FCLK_23 | fGCLK_SERCOMx_CORE | SERCOMx input clock frequency | 160 | MHz |
FCLK_25 | fGCLK_CANx | CAN input clock frequency | 100 | MHz |
FCLK_29 | fGCLK_I2S | I2S input clock frequency | 100 | MHz |
FCLK_31 | fGCLK_SDHCx_SLOW | Common SDHC slow input clock frequency | 32 | KHz |
FCLK_33 | fGCLK_SDHCx_CORE | SDHCx input clock frequency | 104 | MHz |
FCLK_35 | fGCLK_TCCx | TCCx input clock frequency | FCY | MHz |
FCLK_45 | fGCLK_GCLKINx | External GCLKx input clock frequency | 50 | MHz |
FCLK_47 | fGCLK_CM7_TRACE | CM7 Trace input clock frequency | 50 | MHz |
FCLK_49 | fGCLK_AC | Analog comparator peripheral module clock frequency | 100 | MHz |
FCLK_51 | fGCLK_ADCx | ADCx input clock frequency | 150 | MHz |
FCLK_55 | fGCLK_PTC | PTC input clock frequency | 128 | MHz |
FCLK_57 | fGCLK_EBI | EBI input clock frequency | 150 | MHz |
FCLK_61 | fGCLK_GMAC_TX | Ethernet input clock frequency | 125 | MHz |
FCLK_62 | fGCLK_ETH_TSU | Ethernet TSU input clock frequency | 200 | MHz |
FCLK_65 | fGCLK_MLB | Media Local Bus GCLK frequency | 150 | MHz |
FCLK_73 | fGCLK_QSPI | QSPI internal GCLK frequency | 160 | MHz |