48.15 External 32.768 kHz Oscillator (XOSC32) Electrical Specifications

Table 48-18. XOSC32K AC Electrical Specifications
AC CHARACTERISTICSStandard Operating Conditions: VDDIO = AVDD 1.75V to 3.63V, VDDREG = 1.75V to 1.85V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial

Param. No.SymbolCharacteristicsMin.TypicalMax.UnitsConditions (1)
XOSC32_1FOSC_XOSC32XOSC32 Oscillator Crystal Frequency—32.768—kHzXIN32, XOUT32 Secondary Osc
XOSC32_3CXIN32XOSC32 XIN32 parasitic pin capacitance—6.3—pF—
XOSC32_5CXOUT32XOSC32 XOUT32 parasitic pin capacitance—6.3—pF—
XOSC32_11CLOAD_X32 (3) 32.768 kHz Crystal Load Capacitance——12.5pFXOSC32K.CGM ≥ 5

XOSC32K.XTALEN = 1

XOSC32K.ENABLE = 1

XOSC32_13ESR_X32 32.768kHz Crystal ESR——60KΩXOSC32K.CGM ≥ 5

XOSC32K.XTALEN = 1

XOSC32K.ENABLE = 1

Cload = 12.5 pF

XOSC32_14——100KΩXOSC32K.CGM ≥ 10

XOSC32K.XTALEN = 1

XOSC32K.ENABLE = 1

Cload = 12.5 pF

XOSC32_15TOSC32TOSC32 = 1/FOSC_XOSC32—30.5176—µsSee parameter XOSC32_1 for FOSC_XOSC32 value
XOSC32_17XOSC32_ST (2)XOSC32 Crystal Start-up Time ——14000 (4)TOSCXOSC32K.CGM = 6

XOSC32K.XTALEN = 1

XOSC32K.ENABLE = 1

Crystal ESR = 100 KΩ

Cload = 12.5 pF (2)

Crystal stabilization time only not Oscillator Ready

XOSC32_19FOSC_XCLK32Ext Clock Oscillator Input Freq (XIN32 pin)31.13032.76834.406kHzXOSC32K.XTALEN = 0

XOSC32K.ENABLE = 1

XOSC32_21XCLK32_DCExt Clock Oscillator Duty Cycle405060%XOSC32K.XTALEN = 0

XOSC32K.ENABLE = 1

XOSC32_23XCLK32_FSTXIN32 Clock Fail Safe Time-out Period—4*1/(LP32K_1/2^CFDCTRL.CFDPRESC)—ms—
Note:
  1. VDDIOx = ADDANA = 3.3V.
  2. This is for guidance only. A major component of crystal start-up time is based on the 2nd party crystal MFG parasitics that are outside the scope of this specification. If this is a major concern the customer must characterize this based on their design choices.
  3. Crystal Load Capacitor Calculations are as follows:
    • Standard PCB trace capacitance = 1.5 pF per 12.5 mm (0.5 inches) (i.e., PCB STD TRACE W = 0.175 mm, H = 36 μm, T = 113 μm)
    • XTAL PCB capacitance typical, therefore ~= 2.5 pF for a tight PCB XTAL layout
    • For CXIN and CXOUT within 4 pF of each other, assume CXTAL_EFF = ((CXIN+CXOUT) / 2)
      Note: Averaging CXIN and CXOUT will effect final calculated CLOAD value by less than the tolerance of the capacitor selection.

    Equation 1:

    MFG CLOAD Spec = {( [CXIN + C1] * [CXOUT + C2] ) / [CXIN + C1 + C2 + CXOUT] } + estimated oscillator PCB stray capacitance

    • Assuming C1 = C2 and CXIN ~= CXOUT, the formula can be further simplified and restated to solve for C1 and C2 by:

    Equation 2: (i.e., Simplified Equation #1)

    C1 = C2 = ((2 * MFG CLOAD spec) - CXTAL_EFF - (2 * PCB capacitance))

    For example,

    • XTAL Mfg CLOAD Data Sheet Spec = 12 pF
    • PCB XTAL trace Capacitance = 2.5 pF
    • CXIN pin = 6.5 pF, CXOUT pin = 4.5 pF, therefore CXTAL_EFF = ((CXIN+CXOUT) / 2) CXTAL_EFF = ((6.5 + 4.5)/2) = 5.5 pF

    C1 = C2 = ((2 * MFG CLOAD spec) - CXTAL_EFF - (2 * PCB capacitance))

    C1 = C2 = (24 - 5.5 - (2 * 2.5))

    C1 = C2 = (24 - 5.5 - 5)

    C1 = C2 = 13.5 pF (always rounded down)

    C1 = C2 = 13 pF (i.e., for hypothetical example crystal external load capacitors)

    User C1 = C2 = 13 pF ≤ CLOAD_X32(max.) specification

  4. The User Selectable in XOSC32K.STARTUP.
Figure 48-10. XTAL