48.18 Analog-to-Digital Converter (ADC) Electrical Specifications

Table 48-22. ADC AC Electrical Specifications
DC CHARACTERISTICS			Standard Operating Conditions: VDDIO = AVDD 1.75V to 3.63V, VDDREG = 1.75V to 1.85V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
Device Supply
ADC_1	AVDD	ADC Module Supply	AVDD(min)	—	AVDD(max)	V	VDDIOx = AVDD
Reference Inputs
ADC_3	VREF⁽⁴⁾	ADC Reference Voltage ⁽⁴⁾	The greater of ≥ AVDD(min) or 2.4V ⁽⁴⁾	—	AVDD	V	VREF ≤ AVDD
Analog Input Range
ADC_7	AFS	Full-Scale Analog Input Signal Range	AVSS	—	VREF	V	Single-Ended mode
ADC_7	AFS	Full-Scale Analog Input Signal Range	-VREF	—	+VREF	V	Differential mode, VCMIN = VREF/2
ADC_9	VCMIN	Input common mode voltage	—	'VREF/2	—	V	—
Note: Characterized with an analog input sine wave = (FTP(max) / 100). For example, FTP(max) = 1 Msps / 100 = 10 kHz sine wave. Sine wave peak amplitude = 96% ADC_ Full Scale amplitude input with 12-bit resolution. ADC is configured in 12-bits mode. ADC functional device operation with either internal or external VREF < 2.4V is functional, but not characterized. ADC will function but with degraded accuracy of approximately ~((0.006 * 2n) / VREF) LSB’s over full scale range, where "n"= #bits. ADC accuracy is limited by VREF accuracy + drift, MCU generated noise plus users application noise/accuracy on AVDD/AVSS. Value taken over 7 harmonics. Value coming from simulation.

Table 48-23. ADC Single-Ended Mode Electrical Specifications
AC CHARACTERISTICS			Standard Operating Conditions: VDDIO = AVDD 1.75V to 3.63V, VDDREG = 1.75V to 1.85V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typical	Max.	Units	Conditions
Single-Ended Mode ADC Accuracy
SADC_11	Res	Resolution	8	—	12	bits	Selectable 8, 10, 12-bit Resolution Ranges
SADC_13	INL ⁽³⁾	Integral Nonlinearity	-1.5	±1	1.5	LSB	4.6875 Msps, Internal VREF = AVDD = VDDIO = 3.3V
SADC_19	DNL ⁽³⁾	Differential Nonlinearity	-1	-0.75 / +1	1.5	LSB	4.6875 Msps, Internal VREF = AVDD = VDDIO = 3.3V
SADC_25	GERR^(3,6)	Gain Error	-6	—	-2	LSB	4.6875 Msps, Internal VREF = AVDD = VDDIO = 3.3V
SADC_31	EOFF ^(3,6)	Offset Error	1	—	6	LSB	4.6875 Msps, Internal VREF = AVDD = VDDIO = 3.3V
SINGLE ENDED MODE ADC Dynamic Performance
SADC_43	ENOB ⁽³⁾	Effective Number of bits	9	11.2	—	bits	VREF = AVDD = VDDIO = 3.3V @ 12 bit at 4.6875 Msps
SADC_45	SINAD ^(1,2,3)	Signal-to-Noise and Distortion	56	70	—	dB
SADC_47	SNR ^(1,2,3)	Signal-to-Noise ratio	56	70	—
SADC_51	THD ^(1,2,3,5)	Total Harmonic Distortion	—	-80	-75
Note: Characterized with an analog input sine wave = (FTP(max) / 100). For example, FTP(max) = 1 Msps / 100 = 10 kHz sine wave. Sine wave peak amplitude = 96% ADC_ Full Scale amplitude input with 12bit resolution. ADC is configured in 12 bits mode. ADC functional device operation with either internal or external VREF < 2.4V is functional, but not characterized. ADC will function, but with degraded accuracy of approximately ~((0.06 * 2n) / VREF) LSB’s over full scale range, where "n"=#bits. ADC accuracy is limited by internal VREF accuracy + drift, MCU generated noise plus users application noise/accuracy on AVDD/AVSS. Value taken over 7 harmonics. Value coming from simulation.

Table 48-24. ADC Differential Mode Electrical Specifications
AC CHARACTERISTICS			Standard Operating Conditions: VDDIO = AVDD 1.75V to 3.63V, VDDREG = 1.75V to 1.85V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typical	Max.	Units	Conditions
DIFFERENTIAL MODE ADC Accuracy
DADC_11	Res	Resolution	8	—	12	bits	Selectable 8, 10, 12-bit Resolution Ranges
DADC_13	INL ⁽³⁾	Integral Nonlinearity	-2	±1.5	2	LSB	4.6875 Msps, Internal VREF = AVDDA = VDDIO = 3.3V
DADC_19	DNL ⁽³⁾	Differential Nonlinearity	-1	-0.75 / +1	2	LSB	4.6875 Msps, Internal VREF = AVDD = VDDIO = 3.3V
DADC_25	GERR^(3,6)	Gain Error	-6	—	-2	LSB	4.6875 Msps, Internal VREF = AVDD = VDDIO = 3.3V
DADC_31	EOFF ^(3,6)	Offset Error	1	—	3	LSB	4.6875 Msps, Internal VREF = AVDD = VDDIO = 3.3V
DIFFERENTIAL MODE ADC Dynamic Performance
DADC_43	EN0B ⁽³⁾	Effective Number of bits	11	11.4	—	bits	VREF = AVDD = VDDIO = 3.3V @ 12 bit at 4.6875 Msps
DADC_45	SINAD ^(1,2,3)	Signal-to-Noise and Distortion	68	70	—	dB
DADC_47	SNR ^(1,2,3)	Signal-to-Noise ratio	68	70	—
DADC_51	THD ^(1,2,3,5)	Total Harmonic Distortion	—	-84	-80
Note: Characterized with an analog input sine wave = (FTP(max) / 100). For example, FTP(max) = 1 Msps / 100 = 10 kHz sine wave. Sine wave peak amplitude = 96% ADC_ Full Scale amplitude input with 12-bit resolution. ADC is configured in 12 bits mode. ADC functional device operation with either internal or external VREF < 2.4V is functional, but not characterized. ADC will function, but with degraded accuracy of approximately ~((0.06 * 2n) / VREF) LSB’s over full scale range, where "n"=#bits. ADC accuracy is limited by internal VREF accuracy + drift, MCU generated noise plus users application noise/accuracy on AVDD/AVSS. Value taken over 7 harmonics. Value coming from simulation.

Table 48-25. ADC Conversion AC Electrical Requirements
AC CHARACTERISTICS			Standard Operating Conditions: VDDIO = AVDD 1.75V to 3.63V, VDDREG = 1.75V to 1.85V (unless otherwise stated) Operating temperature : -40°C ≤ TA ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typical	Max.	Units	Conditions
ADC_ Clock Requirements
ADC_53	TAD	ADC Clock Period	13.333	—	7142	ns	VREF = AVDD = 3.3V and Res = 6, 8, 10-bit
ADC_53	TAD	ADC Clock Period	13.33	—	1250	ns	VREF = AVDD = 3.3V and Res = 12 bit
ADC_55	fGCLK_ADCx	ADCx Module GCLK maximum input freq	—	—	FCLK_51	MHz	VREF = AVDD = 3.3V
ADC Throughput Rates
ADC_57	FTPR⁽¹⁾	Sample-Rate for ADC1, 2, 3 with SAMC = 1 (min)	—	—	4.687500	Msps	12-bit resolution, Rsource Impedance ≤ 200 Ω
			—	—	5.357143		10-bit resolution, Rsource Impedance ≤ 350 Ω
			—	—	6.250000		8-bit resolution, Rsource Impedance ≤ 500 Ω
			—	—	7.500000		6-bit resolution, Rsource Impedance ≤ 650 Ω
		Sample-Rate for ADC0 with SAMC = 4 (min)	—	—	3.947368	Msps	12-bit resolution, Rsource Impedance ≤ 200 Ω
			—	—	4.411765		10-bit resolution, Rsource Impedance ≤ 350 Ω
			—	—	5.000000		8-bit resolution, Rsource Impedance ≤ 500 Ω
			—	—	5.769231		6-bit resolution, Rsource Impedance ≤ 650 Ω
Note: ADC Throughput Rate FTP = ((1 / ((TSAMP + TCNV) * TAD)) / (number of users active analog inputs in use on a specific target ADC module)). Specification values assume only one AINx channel in use.

Table 48-26. ADC SAMPLE AC Electrical Requirements
AC CHARACTERISTICS			Standard Operating Conditions: VDDIO = AVDD 1.75V to 3.63V, VDDREG = 1.75V to 1.85V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typical	Max.	Units	Conditions
ADC_59	TSAMP	Sample-Time for ADC1,2,3	3	—	—	TAD	12-bit TAD(min), Ext Analog Input Rsource ≤ 200 Ω, Max ADC Clock
			3	—	—		10-bit TAD(min), Ext Analog Input Rsource ≤ 350 Ω, Max ADC Clock
			5	—	—		12-bit TAD(min), Ext Analog Input Rsource ≤ 500Ω, Max ADC Clock
			5	—	—		10-bit TAD(min), Ext Analog Input Rsource ≤ 700 Ω, Max ADC Clock
			8	—	—		12-bit TAD(min), Ext Analog Input Rsource ≤ 1kΩ, Max ADC Clock
			8	—	—		10-bit TAD(min), Ext Analog Input Rsource ≤ 1,25 kΩ, Max ADC Clock
			34	—	—		12-bit TAD(min), Ext Analog Input Rsource ≤ 5 kΩ, Max ADC Clock
			34	—	—		10-bit TAD(min), Ext Analog Input Rsource ≤ 5,5 kΩ, max ADC Clock
ADC_59	TSAMP	Sample-Time for ADC0	6	—	—	TAD	12-bit TAD(min), Ext Analog Input Rsource ≤ 200 Ω, Max ADC Clock
			6	—	—		10-bit TAD(min), Ext Analog Input Rsource ≤ 350 Ω, Max ADC Clock
			8	—	—		12-bit TAD(min), Ext Analog Input Rsource ≤ 500 Ω, Max ADC Clock
			8	—	—		10-bit TAD(min), Ext Analog Input Rsource ≤ 700 Ω, Max ADC Clock
			12	—	—		12-bit TAD(min), Ext Analog Input Rsource ≤ 1 kΩ, Max ADC Clock
			12	—	—		10-bit TAD(min), Ext Analog Input Rsource ≤ 1.25 kΩ, Max ADC Clock
			41	—	—		12-bit TAD(min), Ext Analog Input Rsource ≤ 5 kΩ, Max ADC Clock
			41	—	—		10-bit TAD(min), Ext Analog Input Rsource ≤ 5.5 kΩ, Max ADC Clock
		Sample-Time for ACD3 Channel6	258	—	—		12-bit resolution, for internal BandGap 1.2V measurement .
ADC_61	TCNV	Conversion Time (after sample time is complete)	13			TAD	12-bit resolution
			11				10-bit resolution
			9				8-bit resolution
			7				6-bit resolution
ADC_63	Twarm-up	Warm Up Time after CTRLA.ANAEN = 1 and CTRLA.ENABLE = 1	—	—	500 TAD or 20 µs, which ever is bigger	µs	—

PIC32CZ CA80/CA90 Family

48.18 Analog-to-Digital Converter (ADC) Electrical Specifications