Jump to main content
16.3.57 ADC 2 Channel x Secondary
Accumulator Register
Legend: n = ADC number; R = Readable bit; W = Writable bit
Name: AD2CHxACC Offset: 0x934, 0x954, 0x974,
0x994, 0x9B4, 0x9D4, 0x9F4, 0x0A14
Bit 31 30 29 28 27 26 25 24 ACC[31:24] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16 ACC[23:16] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 ACC[15:8] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 ACC[7:0] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bits 31:0 – ACC[31:0] Secondary
Accumulator bits
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.