24.3.4 BiSS Client Configuration Register

Name:	B1CLTCONx
Offset:	0x21C0, 0x21C4, 0x21C8, 0x21CC


Bit	31	30	29	28	27	26	25	24
	CRCSEEDx[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	CRCSEEDx[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	CRCSELx	CRCLENx[6:0]CRCPOLYx[6:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	GRAYxLSTOPx	SCDENx	SCDLENx[5:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 31:16 – CRCSEEDx[15:0] Polynomial SCD CRC Calculation Start Value bits

Bit 15 – CRCSELx Select CRC bit

Value	Description
1	CRC polynomial(7:1) in CRCPOLYx
0	CRC bit length in CRCLENx will apply dedicated CRC polynomials.

Bits 14:8 – CRCLENx[6:0]CRCPOLYx[6:0] Polynomial Selection by Length for SCD CRC Check bit/Polynomial for SCD CRC Check bits

CRCLENx and CRCPOLYx share the same register location.

Value	Description
	When CRCLENx is selected:
0010000	CRC polynomial 0b1.1001.0000.1101.1001 = 0x190D9
0001000	CRC polynomial 0b1.0010.1111 = 0x12F
0000111	CRC polynomial 0b1000.1001 = 0x89
0000110	CRC polynomial 0b100.0011 = 0x43
0000101	CRC polynomial 0b10.0101 = 0x25
0000100	CRC polynomial 0b1.0011 = 0x13
0000011	CRC polynomial 0b1011 = 0xB
0000000	CRC for single cycle data not present, CRC verification deactivated, CRCSELx = 0b0.
	When CRCPOLYx is selected:
11111111-0000001	CRC polynomial for single-cycle data
0000000	CRC polynomial 0x00 not applicable with CRCSELx = 0b1

Bit 7 – GRAYxLSTOPx Enable SCD Gray to Binary Conversion bit (SSI only)/Leading STOP bit on Single Cycle bit (actuator data only)

GRAYx and LSTOPx share the same register location.

Value	Description
	When GRAYx is selected
1	SSI single-cycle data gray coded.
0	SSI single-cycle data binary coded.
	When LSTOPx is selected:
1	Leading STOP Bit on Single-Cycle Actuator Data (Do not send STOP bit before Actuator data).
0	No Leading STOP Bit on Single-Cycle Actuator Data (Send STOP bit before Actuator data).

Bit 6 – SCDENx Enable Single Cycle Data bit

Value	Description
1	Single-cycle data available.
0	Single-cycle data not available.

Bits 5:0 – SCDLENx[5:0] Single Cycle Data Length bits

Value	Description
111111	Single cycle data length = 64
...
000001	Single cycle data length = 2
000000	Single cycle data length = 1

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