24.3.11 BiSS Channel Status Register
| Name: | B1CHSTAT |
| Offset: | 0x21F8 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| BKSWERR | |||||||||
| Access | R | ||||||||
| Reset | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CDS0 | SL0 | ||||||||
| Access | R | R | |||||||
| Reset | 0 | x |
Bit 24 – BKSWERR Switch Bank Failed bit
| Value | Description |
|---|---|
| 1 | Bank switching (SCD) not successful |
| 0 | Bank switching (SCD) successful |
Bit 1 – CDS0 Channel 0 CDS bit
| Value | Description |
|---|---|
| 1 | CDS0 =
1
|
| 0 | CDS0 =
0 |
Bit 0 – SL0 SL0 Input Line State bit
| Value | Description |
|---|---|
| 1 | SL0 line level high |
| 0 | SL0 line level low |