24.3.9 BiSS Communication Status Register
| Name: | B1STAT |
| Offset: | 0x21F0 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| CDMTO | CDSSEL | REGBYTESV[5:0] | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CLSCDV3 | CLSCDV2 | CLSCDV1 | CLSCDV0 | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ERR | AGSERR | DLYERR | SCDTXERR | REGERR | REGEND | EOT | |||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 31 – CDMTO CDM Timeout Reached bit
| Value | Description |
|---|---|
| 1 | CDMTIMEOUT reached. |
| 0 | CDMTIMEOUT not reached. |
Bit 30 – CDSSEL Selected Channel CDS bit
| Value | Description |
|---|---|
| 1 | CDS of the selected channel = 1 |
| 0 | CDS of the selected channel = 0 |
Bits 29:24 – REGBYTESV[5:0] Valid Register Data Transmitted Before Error bits
| Value | Description |
|---|---|
| 0x01-0x3F | After transfer, the number of successfully transferred registers before a register communication error. |
| 0x00 | After transfer, no register communication error. |
Bit 15 – CLSCDV3 Client 3 Single Cycle Data Valid bit
| Value | Description |
|---|---|
| 1 | Single cycle data valid |
| 0 | Single cycle data invalid |
Bit 13 – CLSCDV2 Client 2 Single Cycle Data Valid bit
| Value | Description |
|---|---|
| 1 | Single cycle data valid |
| 0 | Single cycle data invalid |
Bit 11 – CLSCDV1 Client 1 Single Cycle Data Valid bit
| Value | Description |
|---|---|
| 1 | Single cycle data valid |
| 0 | Single cycle data invalid |
Bit 9 – CLSCDV0 Client 0 Single Cycle Data Valid bit
| Value | Description |
|---|---|
| 1 | Single cycle data valid |
| 0 | Single cycle data invalid |
Bit 7 – ERR Transmission Error bit
| Value | Description |
|---|---|
| 1 | Error |
| 0 | No Error |
Bit 6 – AGSERR AGS Error - Unable to Start SCD Frame bit
| Value | Description |
|---|---|
| 1 | AGS error |
| 0 | No AGS error |
Bit 5 – DLYERR Delay Error bit - Missing Start bit During Register Communication
| Value | Description |
|---|---|
| 1 | Delay error |
| 0 | No Delay error |
Bit 4 – SCDTXERR SCD Transmission Error bit
| Value | Description |
|---|---|
| 1 | Error in the last single cycle data transmission |
| 0 | No Error in the last single cycle data transmission |
Bit 3 – REGERR Register Communication Error bit
| Value | Description |
|---|---|
| 1 | Error in the last register data transmission |
| 0 | No Error in the last register data transmission |
Bit 2 – REGEND End Of Register Communication Error bit
| Value | Description |
|---|---|
| 1 | Register data transmission is completed. |
| 0 | No valid register data is available. |
Bit 0 – EOT End Of Transmission bit
| Value | Description |
|---|---|
| 1 | Data transmission is finished. |
| 0 | Data transmission is active. |