16.4.42 Auxiliary PWM Frequency Scaling Minimum Period Register

Note:

These bits can be modified while PGxCON.ON = 1.

Name:	AFSMINPER
Offset:	0x1408


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
					FSMINPER[19:16]
Access					R/W	R/W	R/W	R/W
Reset					0	0	0	0


Bit	15	14	13	12	11	10	9	8
	FSMINPER[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	FSMINPER[7:4]
Access	R/W	R/W	R/W	R/W
Reset	0	0	0	0

Bits 19:16 – FSMINPER[19:16]

Bits 15:8 – FSMINPER[15:8]

Bits 7:4 – FSMINPER[7:4] Frequency Scaling Minimum Period Register bits⁽¹⁾

This register holds the minimum clock period (maximum clock frequency) that can be produced by the frequency scaling circuit.

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