16.4.48 Auxiliary PWM Combinatorial PWM Logic Control Register
Note:
- ‘y’ denotes a common instance (A-F).
- Instances of y = A, C and E of LOGCONy assign the logic function output to the PWMxH pin. Instances of y = B, D and F of LOGCONy assign the logic function to the PWMxL pin.
- Caution should be used when
modifying bits while PGxCON.ON =
1; unexpected results may occur.
| Name: | ALOGCONy |
| Offset: | 0x1420, 0x1424 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| PWMS1y[3:0] | PWMS2y[3:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| S1yPOL | S2yPOL | PWMLFy[1:0] | PWMLFyD[2:0] | ||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
Bits 15:12 – PWMS1y[3:0] Combinatorial PWM Logic Source #1 Selection bits
Note: Logic function input will be connected to
‘
0’ if the PWM channel is not present.| Value | Description |
|---|---|
| 1111-1000 | Reserved |
| 0111 | PWML4 |
| 0110 | PWMH4 |
| 0101 | PWML3 |
| 0100 | PWMH3 |
| 0011 | PWML2 |
| 0010 | PWMH2 |
| 0001 | PWML1 |
| 0000 | PWMH1 |
Bits 11:8 – PWMS2y[3:0] Combinatorial PWM Logic Source #2 Selection bits
Note: Logic function input
will be connected to ‘
0’ if the PWM channel is not present.| Value | Description |
|---|---|
| 1111-1000 | Reserved |
| 0111 | PWML4 |
| 0110 | PWMH4 |
| 0101 | PWML3 |
| 0100 | PWMH3 |
| 0011 | PWML2 |
| 0010 | PWMH2 |
| 0001 | PWML1 |
| 0000 | PWMH1 |
Bit 7 – S1yPOL Combinatorial PWM Logic Source #1 Polarity bit
| Value | Description |
|---|---|
1 |
Input is inverted. |
0 |
Input is positive logic. |
Bit 6 – S2yPOL Combinatorial PWM Logic Source #2 Polarity bit
| Value | Description |
|---|---|
1 |
Input is inverted. |
0 |
Input is positive logic. |
Bits 5:4 – PWMLFy[1:0] Combinatorial PWM Logic Function Selection bits
| Value | Description |
|---|---|
11 |
Reserved |
10 |
PWMS1y ^ PWMS2y (XOR) |
01 |
PWMS1y & PWMS2y (AND) |
00 |
PWMS1y | PWMS2y (OR) |
Bits 2:0 – PWMLFyD[2:0] Combinatorial PWM Logic Destination Selection bits(3)
| Value | Description |
|---|---|
| 1111-1000 | Reserved |
| 0111 | PWML4 |
| 0110 | PWMH4 |
| 0101 | PWML3 |
| 0100 | PWMH3 |
| 0011 | PWML2 |
| 0010 | PWMH2 |
| 0001 | PWML1 |
| 0000 | PWMH1 |