16.3.21 ADC 2 Channel n High Compare Register

Legend: n = ADC channel number (0-7); R = Readable bit; W = Writable bit

Name:	AD2CHnCMPHI
Offset:	0xA30, 0xA50, 0xA70, 0xA90, 0xAB0, 0xAD0, 0xAF0, 0xB10


Bit	31	30	29	28	27	26	25	24
	CMPHI[31:24]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	CMPHI[23:16]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	CMPHI[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	CMPHI[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 31:0 – CMPHI[31:0] High Threshold Comparator Value bits

DS70005591D

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