The following configuration values are valid for all listed bit names of this register:
0: The corresponding interrupt is masked.
1: The corresponding interrupt is activated.
Name:
CSI2DC_VPIMR
Offset:
0xF0
Reset:
0x00000000
Property:
Read-only
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
Access
Reset
Bit
15
14
13
12
11
10
9
8
Access
Reset
Bit
7
6
5
4
3
2
1
0
PKTOVF
LTE
STE
CTLOVF
RATEOVF
CAPTURE
Access
R
R
R
R
R
R
Reset
0
0
0
0
0
0
Bit 5 – PKTOVF Packet Overflow For Video Pipe Interrupt Mask
Bit 4 – LTE Packet Longer Than Expected Interrupt Mask
Bit 3 – STE Packet Shorter Than Expected Interrupt Mask
Bit 2 – CTLOVF Control Buffer Overflow Interrupt Mask
Bit 1 – RATEOVF Rate Buffer Overflow Interrupt Mask
Bit 0 – CAPTURE Video Pipeline Capture Interrupt Mask
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
