42.6.52 CSI2DC Video Pipe Interrupt Status Register
| Name: | CSI2DC_VPISR |
| Offset: | 0xF4 |
| Reset: | 0x00000000 |
| Property: | Read-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PKTOVF | LTE | STE | CTLOVF | RATEOVF | CAPTURE | ||||
| Access | R | R | R | R | R | R | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 5 – PKTOVF Packet Overflow For Video Pipe Interrupt Status
| Value | Description |
|---|---|
| 0 | No packet overflow since the last read of the register. |
| 1 | A packet overflow has been detected. |
Bit 4 – LTE Packet Longer Than Expected Interrupt Status
| Value | Description |
|---|---|
| 0 | No packet longer than expected since the last read of the register. |
| 1 | A packet longer than expected has been detected. |
Bit 3 – STE Packet Shorter Than Expected Interrupt Status
| Value | Description |
|---|---|
| 0 | No packet shorter than expected since the last read of the register. |
| 1 | A packet shorter than expected has been detected. |
Bit 2 – CTLOVF Control Buffer Overflow Interrupt Status
| Value | Description |
|---|---|
| 0 | No Control Buffer Overflow since the last read of the register. |
| 1 | A Control Buffer Overflow has been detected. |
Bit 1 – RATEOVF Rate Buffer Overflow Interrupt Status
| Value | Description |
|---|---|
| 0 | No Rate Buffer Overflow since the last read of the register |
| 1 | A Rate Buffer Overflow has been detected. |
Bit 0 – CAPTURE Video Pipeline Capture Status
| Value | Description |
|---|---|
| 0 | No frame capture since the last read of the register. |
| 1 | A frame has been captured in the video pipeline. |