42.6.50 CSI2DC Video Pipe Interrupt Disable Register
The following configuration values are valid for all listed bit names of this register:
0: No effect.
1: Disables the corresponding interrupt.
Name:
CSI2DC_VPIDR
Offset:
0xEC
Reset:
–
Property:
Write-only
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
Access
Reset
Bit
15
14
13
12
11
10
9
8
Access
Reset
Bit
7
6
5
4
3
2
1
0
PKTOVF
LTE
STE
CTLOVF
RATEOVF
CAPTURE
Access
W
W
W
W
W
W
Reset
–
–
–
–
–
–
Bit 5 – PKTOVF Packet Overflow For Video Pipe Interrupt Disable
Bit 4 – LTE Packet Longer Than Expected Interrupt Disable
Bit 3 – STE Packet Shorter Than Expected Interrupt Disable
Bit 2 – CTLOVF Control Buffer Overflow Interrupt Disable
Bit 1 – RATEOVF Rate Buffer Overflow Interrupt Disable
Bit 0 – CAPTURE Video Pipeline Capture Interrupt Disable
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