The following configuration values are valid for all listed bit names of this register:
0: No effect.
1: Disables the corresponding interrupt.
Name:
CSI2DC_GIDR
Offset:
0x10
Reset:
–
Property:
Write-only
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
Access
Reset
Bit
15
14
13
12
11
10
9
8
Access
Reset
Bit
7
6
5
4
3
2
1
0
DED
SEC
DP
VP
IDS
GLP
GSP
SSP
Access
W
W
W
W
W
W
W
W
Reset
–
–
–
–
–
–
–
–
Bit 7 – DED Double Bit Error Detected Interrupt Disable
Bit 6 – SEC Single Bit Error Corrected Interrupt Disable
Bit 5 – DP Data Pipe Interrupt Disable
Bit 4 – VP Video Pipe Interrupt Disable
Bit 3 – IDS Image Data Packet Snoop Controller Interrupt Disable
Bit 2 – GLP Generic Long Packet Interrupt Disable
Bit 1 – GSP Generic Short Packet Interrupt Disable
Bit 0 – SSP Synchronization Short Packet Interrupt Disable
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