63.10.56 TWI Host Mode Register
Name: | FLEX_TWI_MMR |
Offset: | 0x604 |
Reset: | 0x00000000 |
Property: | Read/Write |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
NOAP | |||||||||
Access | R/W | ||||||||
Reset | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
DADR[6:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
SCLRBL[1:0] | MREAD | IADRSZ[1:0] | |||||||
Access | R/W | R/W | R/W | R/W | R/W | ||||
Reset | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
Access | |||||||||
Reset |
Bit 24 – NOAP No Auto-Stop On NACK Error
Value | Description |
---|---|
0 | A stop condition is sent automatically upon Not-Acknowledge error detection. |
1 | No automatic action is performed upon Not-Acknowledge error detection. |
Bits 22:16 – DADR[6:0] Device Address
The device address is used to access client devices in Read or Write mode. Those bits are only used in Host mode.
Bits 14:13 – SCLRBL[1:0] SCL Rise Boost Level
Number of clock periods during which SCL rise is boosted (meaning line driven to level ‘1’).
Bit 12 – MREAD Host Read Direction
Value | Description |
---|---|
0 | Host write direction. |
1 | Host read direction. |
Bits 9:8 – IADRSZ[1:0] Internal Device Address Size
Value | Name | Description |
---|---|---|
0 | NONE | No internal device address |
1 | 1_BYTE | One-byte internal device address |
2 | 2_BYTE | Two-byte internal device address |
3 | 3_BYTE | Three-byte internal device address |