63.10.28 USART Comparison Register

This register can only be written if the WPEN bit is cleared in the USART Write Protection Mode Register.

Name:	FLEX_US_CMPR
Offset:	0x290
Reset:	0x00000000
Property:	Read/Write


Bit	31	30	29	28	27	26	25	24
								VAL2[8]
Access								R/W
Reset								0


Bit	23	22	21	20	19	18	17	16
	VAL2[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
		CMPPAR	CMPMODE[1:0]					VAL1[8]
Access		R/W	R/W	R/W				R/W
Reset		0	0	0				0


Bit	7	6	5	4	3	2	1	0
	VAL1[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 24:16 – VAL2[8:0] Second Comparison Value for Received Character

Value	Description
0–511	The received character must be lower than or equal to the value of VAL2 and higher than or equal to VAL1 to set the FLEX_US_CSR.CMP flag. If asynchronous partial wakeup is enabled in PMC_SLPWK_ER, the UART requests a system wakeup if condition is met.

Bit 14 – CMPPAR Compare Parity

Value	Description
0	The parity is not checked and a bad parity cannot prevent from waking up the system.
1	The parity is checked and a matching condition on data can be cancelled by an error on parity bit, so no wakeup is performed.

Bits 13:12 – CMPMODE[1:0] Comparison Mode

Value	Name	Description
0	FLAG_ONLY	Any character is received and comparison function drives CMP flag.
1	START_CONDITION	Comparison condition must be met to start reception.
2	FILTER	Comparison must be met to receive the current data only

Bits 8:0 – VAL1[8:0] First Comparison Value for Received Character

Value	Description
0–511	The received character must be higher than or equal to the value of VAL1 and lower than or equal to VAL2 to set the FLEX_US_CSR.CMP flag. If asynchronous partial wakeup is enabled in PMC_SLPWK_ER, the UART requests a system wakeup if the condition is met.

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