12.2.4.1 Baud Rate Generation
The baud rate generator contains free-running counters that generate the internal clocks. The design utilizes an asynchronous baud rate generation circuit and also allows for synchronous slave and master modes.
Following are the three major baud rate generation modes:
- Fractional Baud Rate Generation–Asynchronous and Synchronous–Master Mode: The baud rate generation follows asynchronous operation, but with an averaging function which yields more precise, overall baud rate values in fractions of system clock cycles.
- Clock-In Adaptation–Synchronous–Slave Mode: In this mode, the MMUART_X_SCK_IN (serial input synchronous clock) determines the baud rate. MMUART may receive and transmit data based on this clock (full-duplex).
- Clock-Out Generation–Synchronous–Master Mode: In this mode, MMUART_X_SCK_OUT (serial output synchronous clock) determines baud rate based on the baud rate registers. MMUART may receive and transmit data based on this clock (full-duplex).
Software may drive half-duplex communication based on the application, and a single line may be used for MMUART_X_TXD and MMUART_X_RXD transmissions through a bi-directional pad. While transmitting data, the reception is inhibited and vice-versa. This can be done by enabling the single-wire half-duplex enable (MMUART_X_ESWM). The following figure illustrates different MMUART system topologies:
