2.7.1.5 Interrupt Set-pending Registers
The NVIC_ISPR0-NVIC_ISPR7 registers force interrupts into the pending state, and show which interrupts are pending. See the register summary in Table 2-34 for the register attributes.
The bit assignments are:
![](GUID-799695BB-48FC-4149-9F2B-41E1C4D4026E-low.png)
Bits | Name | Function |
---|---|---|
[31:0] | SETPEND | Interrupt set-pending bits. Write: 0: No effect 1: Changes interrupt state to pending. Read: 0: Interrupt is not pending 1: Interrupt is pending. |
Important: Writing 1 to the NVIC_ISPR bit corresponding to:
- An interrupt that is pending has no effect.
- A disabled interrupt sets the state of that interrupt to pending.