2.7.1.9 Software Trigger Interrupt Register

Write to the STIR to generate an interrupt from software. See the register summary in Table 2-34 for the STIR attributes.

When the USERSETMPEND bit in the SCR is set to 1, unprivileged software can access the STIR, see System Control Register.

Important: Only privileged software can enable unprivileged access to the STIR.

The bit assignments are:

Figure 2-25. IABR Register Bit Assignments
Table 2-42. STIR Bit Assignments
BitsFieldFunction
[31:9]Reserved.
[8:0]INTIDInterrupt ID of the interrupt to trigger, in the range 0-239. For example, a value of 0x03 specifies interrupt IRQ3.