3.1.4 Channel Matrix Register
The CHANNEL_MATRIX register allows the users to map physical channels to logical channels. The number of available physical channels is defined by the AFE, which is determined in the AFE_SELECTION register except for the PIC32CXMTSH. Some AFEs offer a combination of single-ended and differential channels. For optimal performance when measuring low-level signals, it is recommended to use differential channels for current measurements.
The table below outlines how the physical channels (CHANNEL_x) are mapped to the supported configurations of the AFEs.
| Configuration | Physical Channels | |||||||
|---|---|---|---|---|---|---|---|---|
| CHANNEL_0 | CHANNEL_1 | CHANNEL_2 | CHANNEL_3 | CHANNEL_4 | CHANNEL_5 | CHANNEL_6 | CHANNEL_7 | |
| 1xATSENSE301 | IP0/IN01 | IP1/IN1 | VP1/VN | IP2/IN2 | VP2/VN | IP3/IN3 | VP3/VN | N/A |
| 3xMCP3910 | CH0+/CH0-(in MCP3910 connected to CS0 of PIC32CXMTC) | CH1+/CH1-(in MCP3910 connected to CS0 of PIC32CXMTC) | CH0+/CH0-(in MCP3910 connected to CS1 of PIC32CXMTC) | CH1+/CH1-(in MCP3910 connected to CS1 of PIC32CXMTC) | CH0+/CH0-(in MCP3910 connected to CS2 of PIC32CXMTC) | CH1+/CH1-(in MCP3910 connected to CS2 of PIC32CXMTC) | N/A | N/A |
| 4xMCP3910 | CH0+/CH0-(in MCP3910 connected to CS0 of PIC32CXMTC) | CH1+/CH1-(in MCP3910 connected to CS0 of PIC32CXMTC) | CH0+/CH0-(in MCP3910 connected to CS1 of PIC32CXMTC) | CH1+/CH1-(in MCP3910 connected to CS1 of PIC32CXMTC) | CH0+/CH0-(in MCP3910 connected to CS2 of PIC32CXMTC) | CH1+/CH1-(in MCP3910 connected to CS2 of PIC32CXMTC) | CH0+/CH0-(in MCP3910 connected to CS3 of PIC32CXMTC) | CH1+/CH1-(in MCP3910 connected to CS3 of PIC32CXMTC) |
| 1xMCP3912 | CH0+/CH0- | CH1+/CH1- | CH2+/CH2- | CH3+/CH3- | N/A | N/A | N/A | N/A |
| 1xMCP3913 | CH0+/CH0- | CH1+/CH1- | CH2+/CH2- | CH3+/CH3- | CH4+/CH4- | CH5+/CH5- | N/A | N/A |
| 1xMCP3914 | CH0+/CH0- | CH1+/CH1- | CH2+/CH2- | CH3+/CH3- | CH4+/CH4- | CH5+/CH5- | CH6+/CH6- | CH7+/CH7- |
| PIC32CXMTSH | IP1/IN1 | VP1/VN | IP2/IN2 | VP2/VN | N/A | N/A | N/A | N/A |
- This channel is multiplexed with the internal temperature sensor of the ATSENSE301.
The logical channels defined by the metrology library are as follows:
- I_A, I_B, I_C: Currents for phases A, B, and C
- I_N: Neutral current
- V_A, V_B, V_C: Voltages for phases A, B, and C
- V_D (available only when using an MCP3914 AFE): It provides an additional ADC conversion for the application. The metrology library processes this channel with all metrology filters except for phase correction. This includes the calibration gain and the DC block filter, in case VC_DC_EN is cleared.
| Name: | CHANNEL_MATRIX |
| Property: | Read-Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| CHANNEL_7[3:0] | CHANNEL_6[3:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| CHANNEL_5[3:0] | CHANNEL_4[3:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CHANNEL_3[3:0] | CHANNEL_2[3:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CHANNEL_1[3:0] | CHANNEL_0[3:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 31:28 – CHANNEL_7[3:0] Physical channel 7 mapping
| Value | Description |
|---|---|
| 0 | Physical channel mapped to logical channel I_A |
| 1 | Physical channel mapped to logical channel V_A |
| 2 | Physical channel mapped to logical channel I_B |
| 3 | Physical channel mapped to logical channel V_B |
| 4 | Physical channel mapped to logical channel I_C |
| 5 | Physical channel mapped to logical channel V_C |
| 6 | Physical channel mapped to logical channel I_N |
| 7 | Physical channel mapped to logical channel V_D |
| 8-14 | Reserved for future uses |
| 15 | Not used |
