5.34.81 Arguments

-name project_name

The name of the project. This is used as the base name for most of the files generated from Libero IDE.

-location project_location

The location of the project. Must not be an existing directory.

-family family_name

The Microchip device family for your targeted design.

-die device_die

Die for your targeted design.

-package package_name

Package for your targeted design.

-hdl HDL_type

Sets the HDL type for your new project.

Value

Description

VHDL

Sets your new projects HDL type to VHDL

VERILOG

Sets your new projects to Verilog