This bit is set to
‘1’ if the sequencer state machine stops operation with an
error condition, such as when a sub-state machine is waiting for a condition and the
predefined time is over. The flag can be reset by writing a ‘1’ to
this bit.
Bit 6 – Reserved
Bit
This bit is reserved and read
as ‘0’.
Bit 5 – Reserved
Bit
This bit is reserved and read
as ‘0’.
Bit 4 – Reserved
Bit
This bit is reserved and read
as ‘0’.
Bits 3:0 – SSMESM[3:0] Sequencer State
Machine Error State Machine
This value holds the number
(see Table 3-63) of the state machine that raised the most recent error.
Possible candidates for error are PLL enable, PLL lock and get telegram state
machines.
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