Specifies the type of access to
be performed using this
address.
Value
Description
0
Write
access
1
Read
access
Bit 10 – INCA Increment Address
If set, specifies that the cache
address specified in CWADDR and CSADDR are automatically incremented after each access of
the cache. The increment happens in such a way that all the slices of a selected word are
first accessed before going to the next word.
Bits 9:8 – CSEL[1:0] Cache Select
Selects the cache to be
accessed.
Value
Description
0
Command cache
1
Expected data cache
2
Read data cache
3
Reserved
Bits 7:4 – CSADDR[3:0] Cache Slice Address
Address of the cache slice to be accessed.
Bits 3:0 – CWADDR[3:0] Cache Word Address
Address of the cache word to be accessed.
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