3.6.2.4.26 SYNTHESIS_FORCE_LOGIC_MULT
(Ask a Question)This constraint is used to force all multipliers in the compiled design to be implemented as logic, to avoid any multiplier occupies dedicated hardware DSP block resource.
When this option is enabled, Synopsys attribute /* synthesis syn_multstyle="logic" */ will be applied globally to the compiled design.
- Category
- HLS Constraints
- Value Type
- Boolean
- Valid Values
- 1, 0
- Default Value
- 0: disabled
- Location Where Default is Specified
examples/legup.tcl- Dependencies
- None
- Applicable Flows
- All devices and flows
- Test Status
- Actively in-use
- Examples
set_parameter SYNTHESIS_FORCE_LOGIC_MULT 1