49.11 I/O Pin AC/DC Electrical Specifications

Table 49-12. I/O Pin AC/DC Electrical Specifications
AC - DC Characteristics	Standard Operating Conditions: VDD33 = VDDIO = AVDD = 1.9–3.6V (Unless Otherwise Stated) Operating Temperature: -40°C ≤ TA ≤ +125°C for Extended Temperature
DI_1	VIL	Input voltage low (Drive Strength 4x pins)	GND	—	0.2×VDDIO	V	VDDIO(minimum) -to- VDDIO(maximum)
Input voltage low (Drive Strength 8x pins)	GND	—	0.2×VDDIO	V	VDDIO(minimum) -to- VDDIO(maximum)
Input voltage low (Drive Strength 12x pins)	GND	—	0.2×VDDIO	V	VDDIO(minimum) -to- VDDIO(maximum)
Input voltage low (USB pins)	—	—	0.8	V	VUSB = 3.0–3.6V
DI_3	VIH	Input High Voltage Non-5v tolerant I/O Pins (Drive Strength 4x pins)	0.65×VDDIO	—	VDDIO	V	VDDIO(minimum) -to- VDDIO(maximum)
Input High Voltage Non-5v tolerant I/O Pins (Drive Strength 8x pins)	0.65×VDDIO	—	VDDIO	V	VDDIO(minimum) -to- VDDIO(maximum)
Input High Voltage Non-5v tolerant I/O Pins (Drive Strength 12x pins)	0.65×VDDIO	—	VDDIO	V	VDDIO(minimum) -to- VDDIO(maximum)
Input High Voltage 5V-tolerant I/O Pins (Drive Strength 4x pins)	0.65×VDDIO	—	5.5	V	VDDIO(minimum) -to- 5.5V
Input High Voltage 5V-tolerant I/O Pins (Drive Strength 8x pins)	0.65×VDDIO	—	5.5	V	VDDIO(minimum) -to- 5.5V
Input High Voltage 5V-tolerant I/O Pins (Drive Strength 12x pins)	0.65×VDDIO	—	5.5	V	VDDIO(minimum) -to- 5.5V
Input High Voltage (USB pins)	2	—	—	V	VUSB = 3.0–3.6V
DI_5	VOL	4x Drive Strength I/O pins (Output Low)	—	—	0.4	V	IOL = 8 mA
8x Drive Strength I/O pins (Output Low)	—	—	0.4	IOL = 14 mA
12x Drive Strength I/O pins (Output Low)	—	—	0.4	IOL = 22 mA
Voltage Output Low (USB pins)	—	—	0.3	1.425 kW load connected to VUSB = 3.6V
DI_9	VOH	4x Drive Strength I/O pins (Output High)	VDD-0.6	—	—	V	IOH = 9 mA
8x Drive Strength I/O pins (Output High)	VDD-0.6	—	—	IOH = 16 mA
12x Drive Strength I/O pins (Output High)	VDD-0.6	—	—	VDDIO = 3.3V at IOH = 28 mA
12x Drive Strength I/O pins (Output High)	VDD-0.8	—	—	VDDIO = 1.9V at IOH = 28 mA
Voltage Output High (USB pins)	2.8	—	—	14.25 kW load connected to ground
DI_13	IIL^{(6, 7)}	Input pin leakage current	-1	—	1	uA	GND ≤ VPIN ≤ VDDIO(maximum) (VPIN = Voltage present on pin)
DI_15	R_PDWN	Internal Pull-Down (4x Drive Strength I/O pins)	—	18	—	kΩ	VDDIO(minimum) - VDDIO(maximum)
Internal Pull-Down (8x Drive Strength I/O pins)	—	20	—	kΩ
Internal Pull-Down (12x Drive Strength I/O pins)	—	20	—	kΩ
DI_17	R_PUP	Internal Pull-Up (4x Drive Strength I/O pins)	—	13	—	kΩ
Internal Pull-Up (8x Drive Strength I/O pins)	—	17	—	kΩ
Internal Pull-Up (12x Drive Strength I/O pins)	—	20	—	kΩ
DI_19	I_ICL^{(1, 4, 5)}	Input Low Injection Current	-5	—	0	mA	This parameter applies to all I/O pins. Except VDD, VSS, AVDD,AVSS and NMCLR
DI_21	I_ICH^{(2 ,3, 4, 5)}	Input High Injection Current	0	—	5	mA	This parameter applies to all pins, with the exception of VDD, VSS, AVDD, AVSS, NMCLR and 5V tolerant I/O pins
DI_23	∑I_ICT	Total Input Injection Current (sum of all I/O and control pins) Absolute value of \| ∑I_ICT \|	-20	—	20	mA	Absolute instantaneous sum of all ± input injection currents from all I/O pins. (\| IICL \| + \| IICH \|) ≤ ∑IICT
DI_25	T_RISE	I/O pin Rise Time (4x Drive Strength, High Load)	—	—	9.5	ns	VDDIO(minimum), C_LOAD = 50 pf_(maximum)
I/O pin Rise Time (8x Drive Strength, High Load)	—	—	8	ns
I/O pin Rise Time (12x Drive Strength, High Load)	—	—	7	ns
I/O pin Rise Time (4x Drive Strength, Standard Load)	—	—	6	ns	VDDIO(minimum), C_LOAD = 20 pf
I/O pin Rise Time (8x Drive Strength, Standard Load)	—	—	6	ns
I/O pin Rise Time (12x Drive Strength, Standard Load)	—	—	3.5	ns
DI_27	T_FALL	I/O pin Fall Time (4x Drive Strength, High Load)	—	—	9.5	ns	VDDIO(minimum), C_LOAD = 50 pf_(maximum)
I/O pin Fall Time (8x Drive Strength, High Load)	—	—	8	ns
I/O pin Fall Time (12x Drive Strength, High Load)	—	—	5.6	ns
I/O pin Fall Time (4x Drive Strength, Standard Load)	—	—	6	ns	VDDIO(minimum), C_LOAD = 20 pf
I/O pin Fall Time (8x Drive Strength, Standard Load)	—	—	6	ns
I/O pin Fall Time (12x Drive Strength, Standard Load)	—	—	3.5	ns
Note: VIL source < (GND - 0.3). Characterized but not tested. VIH source > (VDDIO + 0.3) for non-5V tolerant pins only. On USB, “D+” and “D-” VIH source > (VUSB+0.3). Characterized but not tested. Digital 5V tolerant pins do not have an internal high side Diode to VDDIO , and therefore, cannot tolerate any “positive” input injection current (in other words, positive injection current, VIH source > (VDDIO+0.3)). If the sum of all injection currents are > \| ∑IICT \| it can affect the ADC results by approximately 4 to 6 counts (in other words, VIH Source > (VDDIO + 0.3) or VIL source < (GND - 0.3)). Any number and the combination of I/O pins not excluded under IICL or IICH conditions are permitted provided the “absolute instantaneous” sum of the input injection currents from all pins do not exceed the specified ∑IICT limit. To limit the injection current the user must insert a resistor in series RSERIES, (in other words RS), between input source voltage and device pin. The resistor value is calculated according to: For negative Input voltages less than (GND-0.3): RS ≥ absolute value of \| ((VIL source - (GND - 0.3)) / IICL) \|. For positive input voltages greater than (VDDIO +0.3): RS ≥ ((VIH source - (VDDIO +0.3))/ IICH). For Vpin voltages >VDDIO +0.3 and <GND-0.3 then RS = the larger of the values calculated above. The leakage current on the pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. Negative current is defined as current sourced by the pin.

DI_1

VIL

Input voltage low (Drive Strength 4x pins)

GND

—

0.2×VDDIO

V

VDDIO(minimum) -to- VDDIO(maximum)

Input voltage low (Drive Strength 8x pins)

GND

—

0.2×VDDIO

V

VDDIO(minimum) -to- VDDIO(maximum)

Input voltage low (Drive Strength 12x pins)

GND

—

0.2×VDDIO

V

VDDIO(minimum) -to- VDDIO(maximum)

Input voltage low (USB pins)

—

0.8

V

VUSB = 3.0–3.6V

DI_3

VIH

Input High Voltage Non-5v tolerant I/O Pins (Drive Strength 4x pins)

0.65×VDDIO

—

VDDIO

V

VDDIO(minimum) -to- VDDIO(maximum)

Input High Voltage Non-5v tolerant I/O Pins (Drive Strength 8x pins)

0.65×VDDIO

—

VDDIO

V

VDDIO(minimum) -to- VDDIO(maximum)

Input High Voltage Non-5v tolerant I/O Pins (Drive Strength 12x pins)

0.65×VDDIO

—

VDDIO

V

VDDIO(minimum) -to- VDDIO(maximum)

Input High Voltage 5V-tolerant I/O Pins (Drive Strength 4x pins)

0.65×VDDIO

—

5.5

V

VDDIO(minimum) -to- 5.5V

Input High Voltage 5V-tolerant I/O Pins (Drive Strength 8x pins)

0.65×VDDIO

—

5.5

V

VDDIO(minimum) -to- 5.5V

Input High Voltage 5V-tolerant I/O Pins (Drive Strength 12x pins)

0.65×VDDIO

—

5.5

V

VDDIO(minimum) -to- 5.5V

Input High Voltage (USB pins)

2

—

V

VUSB = 3.0–3.6V

DI_5

VOL

4x Drive Strength I/O pins (Output Low)

—

0.4

V

IOL = 8 mA

8x Drive Strength I/O pins (Output Low)

—

0.4

IOL = 14 mA

12x Drive Strength I/O pins (Output Low)

—

0.4

IOL = 22 mA

Voltage Output Low (USB pins)

—

0.3

1.425 kW load connected to VUSB = 3.6V

DI_9

VOH

4x Drive Strength I/O pins (Output High)

VDD-0.6

—

V

IOH = 9 mA

8x Drive Strength I/O pins (Output High)

VDD-0.6

—

IOH = 16 mA

12x Drive Strength I/O pins (Output High)

VDD-0.6

—

VDDIO = 3.3V at IOH = 28 mA

12x Drive Strength I/O pins (Output High)

VDD-0.8

—

VDDIO = 1.9V at IOH = 28 mA

Voltage Output High (USB pins)

2.8

—

14.25 kW load connected to ground

DI_13

IIL^{(6, 7)}

Input pin leakage current

-1

—

1

uA

GND ≤ VPIN ≤ VDDIO(maximum) (VPIN = Voltage present on pin)

DI_15

R_PDWN

Internal Pull-Down (4x Drive Strength I/O pins)

—

18

—

kΩ

VDDIO(minimum) - VDDIO(maximum)

Internal Pull-Down (8x Drive Strength I/O pins)

—

20

—

kΩ

Internal Pull-Down (12x Drive Strength I/O pins)

—

20

—

kΩ

DI_17

R_PUP

Internal Pull-Up (4x Drive Strength I/O pins)

—

13

—

kΩ

Internal Pull-Up (8x Drive Strength I/O pins)

—

17

—

kΩ

Internal Pull-Up (12x Drive Strength I/O pins)

—

20

—

kΩ

DI_19

I_ICL^{(1, 4, 5)}

Input Low Injection Current

-5

—

0

mA

This parameter applies to all I/O pins. Except VDD, VSS, AVDD,AVSS and NMCLR

DI_21

I_ICH^{(2 ,3, 4, 5)}

Input High Injection Current

0

—

5

mA

This parameter applies to all pins, with the exception of VDD, VSS, AVDD, AVSS, NMCLR and 5V tolerant I/O pins

DI_23

∑I_ICT

Total Input Injection Current (sum of all I/O and control pins) Absolute value of | ∑I_ICT |

-20

—

20

mA

Absolute instantaneous sum of all ± input injection currents from all I/O pins. (| IICL | + | IICH |) ≤ ∑IICT

DI_25

T_RISE

I/O pin Rise Time (4x Drive Strength, High Load)

—

9.5

ns

VDDIO(minimum), C_LOAD = 50 pf_(maximum)

I/O pin Rise Time (8x Drive Strength, High Load)

—

8

ns

I/O pin Rise Time (12x Drive Strength, High Load)

—

7

ns

I/O pin Rise Time (4x Drive Strength, Standard Load)

—

6

ns

VDDIO(minimum), C_LOAD = 20 pf

I/O pin Rise Time (8x Drive Strength, Standard Load)

—

6

ns

I/O pin Rise Time (12x Drive Strength, Standard Load)

—

3.5

ns

DI_27

T_FALL

I/O pin Fall Time (4x Drive Strength, High Load)

—

9.5

ns

VDDIO(minimum), C_LOAD = 50 pf_(maximum)

I/O pin Fall Time (8x Drive Strength, High Load)

—

8

ns

I/O pin Fall Time (12x Drive Strength, High Load)

—

5.6

ns

I/O pin Fall Time (4x Drive Strength, Standard Load)

—

6

ns

VDDIO(minimum), C_LOAD = 20 pf

I/O pin Fall Time (8x Drive Strength, Standard Load)

—

6

ns

I/O pin Fall Time (12x Drive Strength, Standard Load)

—

3.5

ns

Note:

VIL source < (GND - 0.3). Characterized but not tested.
VIH source > (VDDIO + 0.3) for non-5V tolerant pins only. On USB, “D+” and “D-” VIH source > (VUSB+0.3). Characterized but not tested.
Digital 5V tolerant pins do not have an internal high side Diode to VDDIO , and therefore, cannot tolerate any “positive” input injection current (in other words, positive injection current, VIH source > (VDDIO+0.3)).
If the sum of all injection currents are > | ∑IICT | it can affect the ADC results by approximately 4 to 6 counts (in other words, VIH Source > (VDDIO + 0.3) or VIL source < (GND - 0.3)).
Any number and the combination of I/O pins not excluded under IICL or IICH conditions are permitted provided the “absolute instantaneous” sum of the input injection currents from all pins do not exceed the specified ∑IICT limit. To limit the injection current the user must insert a resistor in series RSERIES, (in other words RS), between input source voltage and device pin. The resistor value is calculated according to:
- For negative Input voltages less than (GND-0.3): RS ≥ absolute value of | ((VIL source - (GND - 0.3)) / IICL) |.
- For positive input voltages greater than (VDDIO +0.3): RS ≥ ((VIH source - (VDDIO +0.3))/ IICH).
- For Vpin voltages >VDDIO +0.3 and <GND-0.3 then RS = the larger of the values calculated above.
The leakage current on the pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages.
Negative current is defined as current sourced by the pin.

AC - DC Characteristics			Standard Operating Conditions: VDD33 = VDDIO = AVDD = 1.9–3.6V (Unless Otherwise Stated) Operating Temperature: -40°C ≤ TA ≤ +125°C for Extended Temperature
Parameter Number	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
DI_1	VIL	Input voltage low (Drive Strength 4x pins)	GND	—	0.2×VDDIO	V	VDDIO(minimum) -to- VDDIO(maximum)
		Input voltage low (Drive Strength 8x pins)	GND	—	0.2×VDDIO	V	VDDIO(minimum) -to- VDDIO(maximum)
		Input voltage low (Drive Strength 12x pins)	GND	—	0.2×VDDIO	V	VDDIO(minimum) -to- VDDIO(maximum)
		Input voltage low (USB pins)	—	—	0.8	V	VUSB = 3.0–3.6V
DI_3	VIH	Input High Voltage Non-5v tolerant I/O Pins (Drive Strength 4x pins)	0.65×VDDIO	—	VDDIO	V	VDDIO(minimum) -to- VDDIO(maximum)
		Input High Voltage Non-5v tolerant I/O Pins (Drive Strength 8x pins)	0.65×VDDIO	—	VDDIO	V	VDDIO(minimum) -to- VDDIO(maximum)
		Input High Voltage Non-5v tolerant I/O Pins (Drive Strength 12x pins)	0.65×VDDIO	—	VDDIO	V	VDDIO(minimum) -to- VDDIO(maximum)
		Input High Voltage 5V-tolerant I/O Pins (Drive Strength 4x pins)	0.65×VDDIO	—	5.5	V	VDDIO(minimum) -to- 5.5V
		Input High Voltage 5V-tolerant I/O Pins (Drive Strength 8x pins)	0.65×VDDIO	—	5.5	V	VDDIO(minimum) -to- 5.5V
		Input High Voltage 5V-tolerant I/O Pins (Drive Strength 12x pins)	0.65×VDDIO	—	5.5	V	VDDIO(minimum) -to- 5.5V
		Input High Voltage (USB pins)	2	—	—	V	VUSB = 3.0–3.6V
DI_5	VOL	4x Drive Strength I/O pins (Output Low)	—	—	0.4	V	IOL = 8 mA
		8x Drive Strength I/O pins (Output Low)	—	—	0.4		IOL = 14 mA
		12x Drive Strength I/O pins (Output Low)	—	—	0.4		IOL = 22 mA
		Voltage Output Low (USB pins)	—	—	0.3		1.425 kW load connected to VUSB = 3.6V
DI_9	VOH	4x Drive Strength I/O pins (Output High)	VDD-0.6	—	—	V	IOH = 9 mA
		8x Drive Strength I/O pins (Output High)	VDD-0.6	—	—		IOH = 16 mA
		12x Drive Strength I/O pins (Output High)	VDD-0.6	—	—		VDDIO = 3.3V at IOH = 28 mA
		12x Drive Strength I/O pins (Output High)	VDD-0.8	—	—		VDDIO = 1.9V at IOH = 28 mA
		Voltage Output High (USB pins)	2.8	—	—		14.25 kW load connected to ground
DI_13	IIL^{(6, 7)}	Input pin leakage current	-1	—	1	uA	GND ≤ VPIN ≤ VDDIO(maximum) (VPIN = Voltage present on pin)
DI_15	R_PDWN	Internal Pull-Down (4x Drive Strength I/O pins)	—	18	—	kΩ	VDDIO(minimum) - VDDIO(maximum)
		Internal Pull-Down (8x Drive Strength I/O pins)	—	20	—	kΩ
		Internal Pull-Down (12x Drive Strength I/O pins)	—	20	—	kΩ
DI_17	R_PUP	Internal Pull-Up (4x Drive Strength I/O pins)	—	13	—	kΩ
		Internal Pull-Up (8x Drive Strength I/O pins)	—	17	—	kΩ
		Internal Pull-Up (12x Drive Strength I/O pins)	—	20	—	kΩ
DI_19	I_ICL^{(1, 4, 5)}	Input Low Injection Current	-5	—	0	mA	This parameter applies to all I/O pins. Except VDD, VSS, AVDD,AVSS and NMCLR
DI_21	I_ICH^{(2 ,3, 4, 5)}	Input High Injection Current	0	—	5	mA	This parameter applies to all pins, with the exception of VDD, VSS, AVDD, AVSS, NMCLR and 5V tolerant I/O pins
DI_23	∑I_ICT	Total Input Injection Current (sum of all I/O and control pins) Absolute value of \| ∑I_ICT \|	-20	—	20	mA	Absolute instantaneous sum of all ± input injection currents from all I/O pins. (\| IICL \| + \| IICH \|) ≤ ∑IICT
DI_25	T_RISE	I/O pin Rise Time (4x Drive Strength, High Load)	—	—	9.5	ns	VDDIO(minimum), C_LOAD = 50 pf_(maximum)
		I/O pin Rise Time (8x Drive Strength, High Load)	—	—	8	ns
		I/O pin Rise Time (12x Drive Strength, High Load)	—	—	7	ns
		I/O pin Rise Time (4x Drive Strength, Standard Load)	—	—	6	ns	VDDIO(minimum), C_LOAD = 20 pf
		I/O pin Rise Time (8x Drive Strength, Standard Load)	—	—	6	ns
		I/O pin Rise Time (12x Drive Strength, Standard Load)	—	—	3.5	ns
DI_27	T_FALL	I/O pin Fall Time (4x Drive Strength, High Load)	—	—	9.5	ns	VDDIO(minimum), C_LOAD = 50 pf_(maximum)
		I/O pin Fall Time (8x Drive Strength, High Load)	—	—	8	ns
		I/O pin Fall Time (12x Drive Strength, High Load)	—	—	5.6	ns
		I/O pin Fall Time (4x Drive Strength, Standard Load)	—	—	6	ns	VDDIO(minimum), C_LOAD = 20 pf
		I/O pin Fall Time (8x Drive Strength, Standard Load)	—	—	6	ns
		I/O pin Fall Time (12x Drive Strength, Standard Load)	—	—	3.5	ns
Note: VIL source < (GND - 0.3). Characterized but not tested. VIH source > (VDDIO + 0.3) for non-5V tolerant pins only. On USB, “D+” and “D-” VIH source > (VUSB+0.3). Characterized but not tested. Digital 5V tolerant pins do not have an internal high side Diode to VDDIO , and therefore, cannot tolerate any “positive” input injection current (in other words, positive injection current, VIH source > (VDDIO+0.3)). If the sum of all injection currents are > \| ∑IICT \| it can affect the ADC results by approximately 4 to 6 counts (in other words, VIH Source > (VDDIO + 0.3) or VIL source < (GND - 0.3)). Any number and the combination of I/O pins not excluded under IICL or IICH conditions are permitted provided the “absolute instantaneous” sum of the input injection currents from all pins do not exceed the specified ∑IICT limit. To limit the injection current the user must insert a resistor in series RSERIES, (in other words RS), between input source voltage and device pin. The resistor value is calculated according to: For negative Input voltages less than (GND-0.3): RS ≥ absolute value of \| ((VIL source - (GND - 0.3)) / IICL) \|. For positive input voltages greater than (VDDIO +0.3): RS ≥ ((VIH source - (VDDIO +0.3))/ IICH). For Vpin voltages >VDDIO +0.3 and <GND-0.3 then RS = the larger of the values calculated above. The leakage current on the pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. Negative current is defined as current sourced by the pin.