12.6.12 PWM Generator x Control Register Low
- The PWM Generator time base operates from the frequency scaling circuit clock, effectively scaling the duty cycle and period of the PWM Generator output.
| Name: | PGxCONL |
| Offset: | 0x32A, 0x360, 0x396, 0x3CC |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| ON | FRZ | TRGCNT[2:0] | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CLKSEL[1:0] | MODSEL[2:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
Bit 15 – ON Enable bit
| Value | Description |
|---|---|
1 |
PWM Generator is enabled. |
0 |
PWM Generator is not enabled. |
Bit 14 – FRZ PGx Freeze bit
| Value | Description |
|---|---|
1 |
PGx stops operation in Debug mode. |
0 |
PGx continues operation in Debug mode. |
Bits 10:8 – TRGCNT[2:0] Trigger Count Select bits
| Value | Description |
|---|---|
111 |
PWM Generator produces eight PWM cycles after being triggered. |
110 |
PWM Generator produces seven PWM cycles after being triggered. |
101 |
PWM Generator produces six PWM cycles after being triggered. |
100 |
PWM Generator produces five PWM cycles after being triggered. |
011 |
PWM Generator produces four PWM cycles after being triggered. |
010 |
PWM Generator produces three PWM cycles after being triggered. |
001 |
PWM Generator produces two PWM cycles after being triggered. |
000 |
PWM Generator produces one PWM cycle after being triggered. |
Bits 4:3 – CLKSEL[1:0] Clock Selection bits
| Value | Description |
|---|---|
11 |
PWM Generator uses the Master clock scaled by frequency scaling circuit(1). |
10 |
PWM Generator uses the Master clock divided by clock divider circuit(1). |
01 |
PWM Generator uses the Master clock selected by the MCLKSEL[1:0] (PCLKCON[1:0]) control bits. |
00 |
No clock selected, PWM Generator is in the lowest power state (default). |
Bits 2:0 – MODSEL[2:0] Mode Selection bits
| Value | Description |
|---|---|
111 |
Dual Edge Center-Aligned PWM mode (interrupt/register update twice per cycle) |
110 |
Dual Edge Center-Aligned PWM mode (interrupt/register update once per cycle) |
101 |
Double-Update Center-Aligned PWM mode |
100 |
Center-Aligned PWM mode |
011 |
Reserved |
010 |
Independent Edge PWM mode, dual output |
001 |
Variable Phase PWM mode |
000 |
Independent Edge PWM mode |