12.3.2 Oscillator Configuration Register

Name: OSCCFG
Offset: 0x3104

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
       FRCLPWR[1:0] 
Access R/WR/W 
Reset 00 
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
   POSCIOFNCKICKSTARTGAIN[1:0]POSCMD[1:0] 
Access R/WR/WR/WR/WR/WR/W 
Reset 000011 

Bits 17:16 – FRCLPWR[1:0] FRC Low-Power Mode Enable bits

ValueDescription
11 Reserved
10 Reserved
01 FRC Low-Power mode
00 FRC Standard-Power mode

Bit 5 – POSCIOFNC Primary CLKO Enable Configuration bit

ValueDescription
1 CLKO output signal active on the OSCO pin; POSC must be disabled or configured for the External Clock mode.
0 CLKO output disabled.

Bit 4 – KICKSTART Kick-Starter Programmability for Primary Oscillator bit

ValueDescription
1 Boost the kick start.
0 Default kick start.

Bits 3:2 – GAIN[1:0] Current Gain Programmability for Oscillator (Output Drive) bits

G3>G2>G1>G0
ValueDescription
11 Gain is G3 (use for 24-32 MHz crystals).
10 Gain is G2 (use for 16-24 MHz crystals).
01 Gain is G1 (use for 8-16 MHz crystals).
00 Gain is G0 (use for 4-8 MHz crystals).

Bits 1:0 – POSCMD[1:0] Primary Oscillator Selection bit

ValueDescription
11 OFF (use pin as GPIO)
10 HS Oscillator mode selected (10 MHz-32 MHz).
01 MS Oscillator mode selected (3.5 MHz-10 MHz).
00 External clock