15.4.3.2.7 Dual Edge Center-Aligned PWM Mode

Dual Edge Center-Aligned PWM mode works identically to Double Update Center-Aligned PWM mode, but allows the rising edge time and the falling edge time to be controlled via separate Data registers. This mode gives the user the most flexibility in the adjustment of the center-aligned pulse, yet offers a lower frequency of interrupt events. Note that this will eliminate the symmetrical nature of the center-aligned PWM pulse unless the PGxPHASE = PGxDC.

• PGxPHASE: Determines the rising edge time pulse from the center of the two timer cycles.
• PGxDC: Determines the falling edge time pulse from the center of the two timer cycles.

Both Single and Double Data Buffer Update modes are available within the Dual Edge Center-Aligned PWM mode. Single Update mode is selected when MODSEL[2:0] = 110 and Double Update mode is selected when MODSEL[2:0] = 111. In Single Update mode, the user may write a new PGxPHASE and PGxDC value at any time during the cycle to be used on the next center-aligned cycle. In Double Update mode, an interrupt event and a Data register update occur every timer cycle. This provides user software the opportunity to modify the PGxDC value for the falling edge event and PGxPHASE for the rising edge event. User software must check the state of the CAHALF bit (PGxSTAT[1]) to determine the appropriate register to update. If CAHALF = 0 (first half of the center-aligned cycle), the user software should write to the PGxDC register. If CAHALF = 1 (second half of cycle), the user software should write to the PGxPHASE register. Figure 15-12 and Figure 15-13 show the relationship between the control SFRs and the output waveform.