15.4.3.2.4 LLC Resonant Converter Mode
Support for LLC resonant converter topologies is provided within the PWM hardware. This mode is similar to a push-pull type of output mode because there are two PWM timer cycles, one active for PWMxH and the other for PWMxL. To maintain stability, the intent of this mode is to capture the on time of the first half and apply it to the second half while maintaining dead time.
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The capture event can occur before or after the existing period count such that PGxCAP ≤ PGxPER. Captures that occur in this range may cause both outputs to remain low in the cycles following this capture.
Control is done on a cycle-by-cycle basis using a PCI input to truncate the high time of
the PWMxH and the period of the first half of the cycle (when STEER =
0). When the PCI event occurs, the hardware captures the period value
(period1) for use on the second half.
| Period1 = PGxCAP +1 |
Period1 = PGxCAP +1
The contents of PGxPER are unaffected as PGxPER is used as an upper period limit in the case of no PCI truncation event. If no PCI event occurs, Period1 = PGxPER +1.
The hardware also calculates the effective high time of PWMxH. It is defined as:
HighTime = Period1 - DTH
The period and resulting high time of the second half (STEER = 1) is
then calculated:
Period2 = HighTime + DTL
The 2nd half of the cycle data then becomes Period2, DTL and HighTime.
Restrictions:
- This Operating mode is not available in HR because the period boundary must coincide with the PWM clock cycle.
- A PCI event within the DTH will result is both outputs being low.