17.3.2 CVD Sensors Pins
Any CVD sensor CVDANx pin can be mapped to any record by PIN[6:0] bits in the record register ITCRECx.
The ANSEL register bits for the I/O ports, associated with the analog input, must be set to
configure the corresponding pins as analog pins. A pin is configured as an analog input
when the corresponding ANSELx bit = 1
. When the ANSELx bit =
0
, the pin is set to a digital control. The ANSELx bits are set
when the device comes out of Reset, causing the ADC input pins to be configured as
analog inputs by default.
The I/O CVDANx pin is controlled by ITC during CVD operation. But when the next CVD sensor is processed, the control for the idle CVDANx pin is returned to the TRIS and LAT registers of the port.
The TRIS registers switch the pins between the digital inputs and outputs. The port pin that is
required for CVD must have its corresponding bit cleared (TRISx = 0
) in
the specific TRIS register, configuring the pin as an output. It will keep the idle CVD
sensor grounded or connected to VDD depending on LAT register settings.
If the sensor CVDANx pin floats (TRISx = 1
) when it is idle between CVD
scans, then the robustness will degrade significantly even with a light
noise.