17.3.14 ITC Enable

The ITC is clocked from ADC 5. Also, the ICT uses Channel 5 of ADC 5 to convert the analog signal. The ADC 5 input 5 connected to CVD capacitors array must be selected in the ADC for the ITC operation. ITC triggers ADC 5 when the Channel 5 trigger source is set to option 26 (ITC). Thus, to enable ITC, the ADC 5 must be initialized first.

The ITC is enabled and can execute CVD scans when the following three bits are set:

• ON bit = 1 in ITCCON1 register (ITC enable)
• CVDEN bit = 1 in ITCCON1 register (CVD capacitor array enable)
• ACCEN bit = 1 in ITCLSxSEQ register (accumulations enable)

When the ON bit is set, the ready bit DRDY in the ITCSTAT register must be polled in software. The DRDY bit is set by hardware when the ITC module is ready for operation.

The example of the ADC 5 initialization and ITC enable code are listed in ADC 5 Initialization and ITC Enable Code.

   // Initialize ADC 5 for operation with ITC
   AD5CH5CON1bits.MODE = 0; // single conversion
    AD5CH5CON1bits.IRQSEL = 0; // each conversion interrupt
    AD5CH5CON1bits.PINSEL = 5; // AD5AN5 connected to CVD capacitors array
    AD5CH5CON1bits.NINSEL = 0; // VSS
    AD5CH5CON1bits.SAMC = 0; // small balance time
    AD5CH5CON1bits.TRG1SRC = 26; // trigger for ITC
    AD5CONbits.ON = 1; // enable ADC 5
    while (AD5CONbits.ADRDY == 0); // wait for ready 
    // Switch on the ITC
    ITCCON1bits.ON = 1; // enable ITC
    while(ITCSTAbits.DRDY == 0); // wait for ITC ready
    ITCCON1bits.CVDEN = 1; // enable CVD capacitors array
    ITCLS0SEQ.ACCEN = 1; // enable accumulations for List # 0
    ITCLS1SEQ.ACCEN = 1; // enable accumulations for List # 1
    ITCLS2SEQ.ACCEN = 1; // enable accumulations for List # 2