5.3.12 PWB ECC RAM Fault Injection Address Register

Legend: R = Readable bit; W = Writable bit

Name:	PWBXECCFADDR, PWBYECCFADDR
Offset:	0x35AC, 0x35EC


Bit	31	30	29	28	27	26	25	24
	ECCFADDR[31:24]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	ECCFADDR[23:16]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	ECCFADDR[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	ECCFADDR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 31:0 – ECCFADDR[31:0] ECC Fault Injection Address bits

These register bits are compared against the RAM address read during the fault injection cycle.

These register bits’ values represent the relative address from the start address of X or Y data spaces depending on the read or write instance of this register. The start address should be added to this relative address to know the corresponding data RAM address.