10.4.33 Interrupt Priority Register 0

Name:	IPC0
Offset:	0xF0


Bit	31	30	29	28	27	26	25	24
		NVMCRCIP[2:0]				NVMIP[2:0]
Access		R/W	R/W	R/W		R/W	R/W	R/W
Reset		1	0	0		1	0	0


Bit	23	22	21	20	19	18	17	16
		NVMECCIP[2:0]				PBERRIP[2:0]
Access		R/W	R/W	R/W		R/W	R/W	R/W
Reset		1	0	0		1	0	0


Bit	15	14	13	12	11	10	9	8
		YRAMECCIP[2:0]				XRAMECCIP[2:0]
Access		R/W	R/W	R/W		R/W	R/W	R/W
Reset		1	0	0		1	0	0


Bit	7	6	5	4	3	2	1	0
		CPUFPUIP[2:0]				IVTCIP[2:0]
Access		R/W	R/W	R/W		R/W	R/W	R/W
Reset		1	0	0		1	0	0

Bits 30:28 – NVMCRCIP[2:0] NVM CRC Operation Completed Interrupt Priority bits

Value	Description
7	Interrupt Priority Level 7 (highest)
6	Interrupt Priority Level 6
5	Interrupt Priority Level 5
4	Interrupt Priority Level 4 (default)
3	Interrupt Priority Level 3
2	Interrupt Priority Level 2
1	Interrupt Priority Level 1
0	Interrupt Priority Level 0 (lowest)

Bits 26:24 – NVMIP[2:0] NVM Program/Erase Op Completed or Terminated Interrupt Priority bits

Value	Description
7	Interrupt Priority Level 7 (highest)
6	Interrupt Priority Level 6
5	Interrupt Priority Level 5
4	Interrupt Priority Level 4 (default)
3	Interrupt Priority Level 3
2	Interrupt Priority Level 2
1	Interrupt Priority Level 1
0	Interrupt Priority Level 0 (lowest)

Bits 22:20 – NVMECCIP[2:0] NVM Data ECC SEC and/or Instruction SEC Interrupt Priority bits

Value	Description
7	Interrupt Priority Level 7 (highest)
6	Interrupt Priority Level 6
5	Interrupt Priority Level 5
4	Interrupt Priority Level 4 (default)
3	Interrupt Priority Level 3
2	Interrupt Priority Level 2
1	Interrupt Priority Level 1
0	Interrupt Priority Level 0 (lowest)

Bits 18:16 – PBERRIP[2:0] PBU Parity Error Interrupt Priority bits

Value	Description
7	Interrupt Priority Level 7 (highest)
6	Interrupt Priority Level 6
5	Interrupt Priority Level 5
4	Interrupt Priority Level 4 (default)
3	Interrupt Priority Level 3
2	Interrupt Priority Level 2
1	Interrupt Priority Level 1
0	Interrupt Priority Level 0 (lowest)

Bits 14:12 – YRAMECCIP[2:0] YRAM Data ECC SEC Interrupt Priority bits

Value	Description
7	Interrupt Priority Level 7 (highest)
6	Interrupt Priority Level 6
5	Interrupt Priority Level 5
4	Interrupt Priority Level 4 (default)
3	Interrupt Priority Level 3
2	Interrupt Priority Level 2
1	Interrupt Priority Level 1
0	Interrupt Priority Level 0 (lowest)

Bits 10:8 – XRAMECCIP[2:0] XRAM Data ECC SEC Interrupt Priority bits

Value	Description
7	Interrupt Priority Level 7 (highest)
6	Interrupt Priority Level 6
5	Interrupt Priority Level 5
4	Interrupt Priority Level 4 (default)
3	Interrupt Priority Level 3
2	Interrupt Priority Level 2
1	Interrupt Priority Level 1
0	Interrupt Priority Level 0 (lowest)

Bits 6:4 – CPUFPUIP[2:0] CPU/FPU Interrupt Priority bits

Value	Description
7	Interrupt Priority Level 7 (highest)
6	Interrupt Priority Level 6
5	Interrupt Priority Level 5
4	Interrupt Priority Level 4 (default)
3	Interrupt Priority Level 3
2	Interrupt Priority Level 2
1	Interrupt Priority Level 1
0	Interrupt Priority Level 0 (lowest)

Bits 2:0 – IVTCIP[2:0] Interrupt Vector Collapse Interrupt Priority bits

Value	Description
7	Interrupt Priority Level 7 (highest)
6	Interrupt Priority Level 6
5	Interrupt Priority Level 5
4	Interrupt Priority Level 4 (default)
3	Interrupt Priority Level 3
2	Interrupt Priority Level 2
1	Interrupt Priority Level 1
0	Interrupt Priority Level 0 (lowest)

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