The following figure shows how the device SRAM memory is organized.
The device is a complex microcontroller with more peripheral units than can be supported within the 64 locations reserved in the Opcode for the IN and OUT instructions. For the extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
The lower 2303 data memory locations address both the register file, the I/O memory, extended I/O memory, and the internal data SRAM. The first 32 locations address the register file, the next 64 location the standard I/O memory, then 160 locations of extended I/O memory, and the next 2K locations address the internal data SRAM.
- Direct
- The direct addressing reaches the entire data space.
- Indirect with Displacement
- The indirect with displacement mode reaches 63 address locations from the base address given by the Y- or Z-register.
- Indirect
- In the register file, registers R26 to R31 feature the indirect addressing pointer registers.
- Indirect with Pre-decrement
- The address registers X, Y, and Z are decremented.
- Indirect with Post-increment
- The address registers X, Y, and Z are incremented.
The 32 general purpose working registers, 64 I/O registers, 160 extended I/O registers, and the 2 K bytes of internal data SRAM in the device are all accessible through all these addressing modes.
