8-bit AVR Microcontrollers

GPIOR2 – General Purpose I/O Register 2

When addressing I/O registers as data space using LD and ST instructions, the provided offset must be used. When using the I/O specific commands IN and OUT, the offset is reduced by 0x20, resulting in an I/O address offset within 0x00 - 0x3F.

The device is a complex microcontroller with more peripheral units than can be supported within the 64 locations reserved in Opcode for the IN and OUT instructions. For the extended I/O space from 0x60 in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.

Name:
GPIOR2
Offset:
0x4B
Reset:
0x00
Access:
When addressing as I/O Register: address offset is 0x2B
Bit76543210
GPIOR2[7:0]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000

Bits 7:0 – GPIOR2[7:0]: General Purpose I/O

General Purpose I/O