Timer/Counter 4,
Input Capture Interrupt Enable
When this bit is
written to one, and the I-flag in the Status Register is set (interrupts globally
enabled), the Timer/Counter 4 Input Capture interrupt is enabled. The corresponding
Interrupt Vector is executed when the ICF4 Flag, located in TIFR4, is
set.
Timer/Counter 4,
Output Compare B Match Interrupt Enable
When this bit is
written to one, and the I-flag in the Status Register is set (interrupts globally
enabled), the Timer/Counter n Output Compare B Match interrupt is enabled. The
corresponding Interrupt Vector is executed when the OCF4B Flag, located in TIFR4, is
set.
Timer/Counter 4,
Output Compare A Match Interrupt Enable
When this bit is
written to one, and the I-flag in the Status Register is set (interrupts globally
enabled), the Timer/Counter n Output Compare A Match interrupt is enabled. The
corresponding Interrupt Vector is executed when the OCF4A Flag, located in TIFR4, is
set.
Timer/Counter 4,
Overflow Interrupt Enable
When this bit is
written to one, and the I-flag in the Status Register is set (interrupts globally
enabled), the Timer/Counter 4 Overflow interrupt is enabled. The corresponding
Interrupt Vector is executed when the TOV Flag, located in TIFR4, is
set.