43.7.8 ISC Clock Disable Register

The following configuration values are valid for all listed bit names of this register:

0: No effect.

1: Performs the corresponding command.

This register can only be written if WPCREN is cleared in ISC_WPMR.

Name: ISC_CLKDIS
Offset: 0x1C
Reset: 
Property: Write-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
       MCSWRSTICSWRST 
Access WW 
Reset  
Bit 76543210 
       MCDISICDIS 
Access WW 
Reset  

Bit 9 – MCSWRST Camera Sensor Clock Domain Software Reset

Bit 8 – ICSWRST ISP Clock Software Reset

Bit 1 – MCDIS Camera Sensor Clock Domain Disable

Bit 0 – ICDIS ISP Clock Disable