43.7.16 ISC Defective Pixel Configuration Register
This register can only be written if WPCFGEN is cleared in ISC_WPMR.
| Name: | ISC_DPC_CFG |
| Offset: | 0x44 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| BLOFST[8:1] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| BLOFST[0] | GDCCLP[2:0] | RE_MODE | ND_MODE | ||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| TA_ENABLE | TC_ENABLE | TM_ENABLE | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| EITPOL | BAYCFG[1:0] | ||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bits 31:23 – BLOFST[8:0] Black Level Offset Value
Bits 22:20 – GDCCLP[2:0] Green Disparity Clipping Value
Bit 17 – RE_MODE Replacement Algorithm
| Value | Description |
|---|---|
| 0 |
Median pixel is used. |
| 1 |
Average pixel is used. |
Bit 16 – ND_MODE Noise Detection Mode
| Value | Description |
|---|---|
| 0 |
At least one detector flag is necessary to trigger the correction. |
| 1 |
All detector flags are required to trigger the correction. |
Bit 14 – TA_ENABLE Average Threshold Enable
| Value | Description |
|---|---|
| 0 |
Average detector is disabled. |
| 1 |
Average detector is enabled. |
Bit 13 – TC_ENABLE Closest Pixels Threshold Enable
| Value | Description |
|---|---|
| 0 |
Closest Pixels detector is disabled. |
| 1 |
Closest Pixels detector is enabled. |
Bit 12 – TM_ENABLE Median Threshold Enable
| Value | Description |
|---|---|
| 0 |
Median detector is disabled. |
| 1 |
Median detector is enabled. |
Bit 4 – EITPOL Edge Interpolation
| Value | Description |
|---|---|
| 0 |
No edge interpolation is performed. |
| 1 |
Edge interpolation is performed. |
Bits 1:0 – BAYCFG[1:0] Color Filter Array Pattern
| Value | Name | Description |
|---|---|---|
| 0 | GRGR |
Starting row configuration is G R G R (red row) |
| 1 | RGRG |
Starting row configuration is R G R G (red row) |
| 2 | GBGB |
Starting row configuration is G B G B (blue row) |
| 3 | BGBG |
Starting row configuration is B G B G (blue row) |