43.7.5 ISC Parallel Front End Configuration 1 Register

This register can only be written if WPCFGEN is cleared in ISC_WPMR.

Name: ISC_PFE_CFG1
Offset: 0x10
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
 COLMAX[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 2322212019181716 
 COLMAX[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 COLMIN[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 COLMIN[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 31:16 – COLMAX[15:0] Column Maximum Limit

Horizontal ending position of the cropping area.

Bits 15:0 – COLMIN[15:0] Column Minimum Limit

Horizontal starting position of the cropping area.