43.7.67 ISC Rounding, Limiting and Packing Configuration Register
This register can only be written if WPCFGEN is cleared in ISC_WPMR.
| Name: | ISC_RLP_CFG |
| Offset: | 0x4F4 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| ALPHA[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| YMODE[1:0] | LSH | REP | MODE[3:0] | ||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 15:8 – ALPHA[7:0] Alpha Value for Alpha-enabled RGB Mode
Bits 7:6 – YMODE[1:0] YCbCr Memory Mapping Configuration Mode
| Value | Name | Description |
|---|---|---|
| 0 | RLP_YCBYCR | Byte 0 is Cr, Byte 1 is Y(n), Byte 2 is Cb, Byte 3 is Y(n+1) |
| 1 | RLP_YCRYCB | Byte 0 is Cb, Byte 1 is Y(n), Byte 2 is Cb, Byte 3 is Y(n+1) |
| 2 | RLP_CBYCRY | Byte 0 is Y(n), Byte 1 is Cr, Byte 2 is Y(n+1), Byte 3 is Cb |
| 3 | RLP_CRYCBY | Byte 0 is Y (n), Byte 1 is Cb, Byte 2 is Y(n+1), Byte 3 is Cr |
Bit 5 – LSH Logical Left Shift for Pixel to 16-bit Container Mapping
| Value | Description |
|---|---|
| 0 |
Logical left shift is disabled. |
| 1 |
Pixel value is left-justified in a 16-bit container. |
Bit 4 – REP Pixel Expansion with Replication Logic
| Value | Description |
|---|---|
| 0 |
Replication is disabled. |
| 1 |
Replication is enabled. |
Bits 3:0 – MODE[3:0] Rounding, Limiting and Packing Mode
| Value | Name | Description |
|---|---|---|
| 0 | DAT8 |
8-bit data |
| 1 | DAT9 |
9-bit data |
| 2 | DAT10 |
10-bit data |
| 3 | DAT11 |
11-bit data |
| 4 | DAT12 |
12-bit data |
| 5 | DATY8 |
8-bit luminance only |
| 6 | DATY10 |
10-bit luminance only |
| 7 | ARGB444 |
12-bit RGB+4-bit Alpha (MSB) |
| 8 | ARGB555 |
15-bit RGB+1-bit Alpha (MSB) |
| 9 | RGB565 |
16-bit RGB |
| 10 | ARGB32 |
24-bits RGB mode+8-bit Alpha |
| 11 | YYCC |
YCbCr mode (full range, [0–255]) |
| 12 | YYCC_LIMITED |
YCbCr mode (limited range) |
| 13 | YCYC | Y(n+1)CbY(n)Cr 422 interleaved full range per component 8-bit [0–255] |
| 14 | YCYC_LIMITED | Y(n+1)CbY(n)Cr 422 interleaved limited range per component 8-bit |
| 15 | BYPASS | 32-bit input is sampled and written to the rlp output port. Select this mode for MIPI RMS mode. |